LM3S8971 Datasheet PDF - Luminary Micro


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LM3S8971
Luminary Micro

Part Number LM3S8971
Description Microcontroller
Page 30 Pages

LM3S8971 datasheet pdf
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PRELIMINARY
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LM3S8971 Microcontroller
DATA SHEET
DS-LM3S8971-1728
Copyright © 2007 Luminary Micro, Inc.



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Legal Disclaimers and Trademark Information
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH LUMINARY MICRO PRODUCTS. NO LICENSE, EXPRESS OR
IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT
AS PROVIDED IN LUMINARY MICRO'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, LUMINARY MICRO ASSUMES NO
LIABILITY WHATSOEVER, AND LUMINARY MICRO DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR
USE OF LUMINARY MICRO'S PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR
PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
LUMINARY MICRO'S PRODUCTS ARE NOT INTENDED FOR USE IN MEDICAL, LIFE SAVING, OR LIFE-SUSTAINING APPLICATIONS.
Luminary Micro may make changes to specifications and product descriptions at any time, without notice. Contact your local Luminary Micro sales office
or your distributor to obtain the latest specifications before placing your product order.
Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Luminary Micro reserves these
for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
Copyright © 2007 Luminary Micro, Inc. All rights reserved. Stellaris is a registered trademark and Luminary Micro and the Luminary Micro logo are
trademarks of Luminary Micro, Inc. or its subsidiaries in the United States and other countries. ARM and Thumb are registered trademarks and Cortex
is a trademark of ARM Limited. Other names and brands may be claimed as the property of others.
Luminary Micro, Inc.
108 Wild Basin, Suite 350
Austin, TX 78746
Main: +1-512-279-8800
Fax: +1-512-279-8879
http://www.luminarymicro.com
2 October 01, 2007
Preliminary



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LM3S8971 Microcontroller
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Table of Contents
About This Document .................................................................................................................... 21
Audience .............................................................................................................................................. 21
About This Manual ................................................................................................................................ 21
Related Documents ............................................................................................................................... 21
Documentation Conventions .................................................................................................................. 21
1
1.1
1.2
1.3
1.4
1.4.1
1.4.2
1.4.3
1.4.4
1.4.5
1.4.6
1.4.7
1.4.8
Architectural Overview ...................................................................................................... 23
Product Features ...................................................................................................................... 23
Target Applications .................................................................................................................... 29
High-Level Block Diagram ......................................................................................................... 29
Functional Overview .................................................................................................................. 30
ARM Cortex™-M3 ..................................................................................................................... 31
Motor Control Peripherals .......................................................................................................... 31
Analog Peripherals .................................................................................................................... 32
Serial Communications Peripherals ............................................................................................ 33
System Peripherals ................................................................................................................... 34
Memory Peripherals .................................................................................................................. 35
Additional Features ................................................................................................................... 35
Hardware Details ...................................................................................................................... 36
2
2.1
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.2.5
2.2.6
ARM Cortex-M3 Processor Core ...................................................................................... 37
Block Diagram .......................................................................................................................... 38
Functional Description ............................................................................................................... 38
Serial Wire and JTAG Debug ..................................................................................................... 38
Embedded Trace Macrocell (ETM) ............................................................................................. 39
Trace Port Interface Unit (TPIU) ................................................................................................. 39
ROM Table ............................................................................................................................... 39
Memory Protection Unit (MPU) ................................................................................................... 39
Nested Vectored Interrupt Controller (NVIC) ................................................................................ 39
3 Memory Map ....................................................................................................................... 43
4 Interrupts ............................................................................................................................ 45
5
5.1
5.2
5.2.1
5.2.2
5.2.3
5.2.4
5.3
5.4
5.4.1
5.4.2
JTAG Interface .................................................................................................................... 48
Block Diagram .......................................................................................................................... 49
Functional Description ............................................................................................................... 49
JTAG Interface Pins .................................................................................................................. 50
JTAG TAP Controller ................................................................................................................. 51
Shift Registers .......................................................................................................................... 52
Operational Considerations ........................................................................................................ 52
Initialization and Configuration ................................................................................................... 55
Register Descriptions ................................................................................................................ 55
Instruction Register (IR) ............................................................................................................. 55
Data Registers .......................................................................................................................... 57
6
6.1
6.1.1
6.1.2
System Control ................................................................................................................... 59
Functional Description ............................................................................................................... 59
Device Identification .................................................................................................................. 59
Reset Control ............................................................................................................................ 59
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6.1.3
6.1.4
6.1.5
6.2
6.3
6.4
7
7.1
7.2
7.2.1
7.2.2
7.2.3
7.2.4
7.2.5
7.2.6
7.2.7
7.3
7.3.1
7.3.2
7.3.3
7.3.4
7.3.5
7.4
7.5
8
8.1
8.2
8.2.1
8.2.2
8.3
8.3.1
8.3.2
8.4
8.5
8.6
9
9.1
9.1.1
9.1.2
9.1.3
9.1.4
9.1.5
9.1.6
9.2
9.3
9.4
Power Control ........................................................................................................................... 62
Clock Control ............................................................................................................................ 62
System Control ......................................................................................................................... 64
Initialization and Configuration ................................................................................................... 65
Register Map ............................................................................................................................ 65
Register Descriptions ................................................................................................................ 66
Hibernation Module .......................................................................................................... 117
Block Diagram ........................................................................................................................ 118
Functional Description ............................................................................................................. 118
Register Access Timing ........................................................................................................... 118
Clock Source .......................................................................................................................... 119
Battery Management ............................................................................................................... 119
Real-Time Clock ...................................................................................................................... 119
Non-Volatile Memory ............................................................................................................... 120
Power Control ......................................................................................................................... 120
Interrupts and Status ............................................................................................................... 120
Initialization and Configuration ................................................................................................. 121
Initialization ............................................................................................................................. 121
RTC Match Functionality (No Hibernation) ................................................................................ 121
RTC Match/Wake-Up from Hibernation ..................................................................................... 121
External Wake-Up from Hibernation .......................................................................................... 122
RTC/External Wake-Up from Hibernation .................................................................................. 122
Register Map .......................................................................................................................... 122
Register Descriptions .............................................................................................................. 123
Internal Memory ............................................................................................................... 136
Block Diagram ........................................................................................................................ 136
Functional Description ............................................................................................................. 136
SRAM Memory ........................................................................................................................ 136
Flash Memory ......................................................................................................................... 137
Flash Memory Initialization and Configuration ........................................................................... 138
Flash Programming ................................................................................................................. 138
Nonvolatile Register Programming ........................................................................................... 139
Register Map .......................................................................................................................... 139
Flash Register Descriptions (Flash Control Offset) ..................................................................... 140
Flash Register Descriptions (System Control Offset) .................................................................. 147
General-Purpose Input/Outputs (GPIOs) ....................................................................... 160
Functional Description ............................................................................................................. 160
Data Control ........................................................................................................................... 160
Interrupt Control ...................................................................................................................... 161
Mode Control .......................................................................................................................... 162
Commit Control ....................................................................................................................... 162
Pad Control ............................................................................................................................. 162
Identification ........................................................................................................................... 163
Initialization and Configuration ................................................................................................. 163
Register Map .......................................................................................................................... 164
Register Descriptions .............................................................................................................. 166
4 October 01, 2007
Preliminary




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