LM3S8730 Datasheet PDF - Luminary Micro


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LM3S8730
Luminary Micro

Part Number LM3S8730
Description Microcontroller
Page 30 Pages

LM3S8730 datasheet pdf
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PRELIMINARY
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LM3S8730 Microcontroller
DATA SHEET
DS-LM3S8730-1582
Copyright © 2007 Luminary Micro, Inc.



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Legal Disclaimers and Trademark Information
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH LUMINARY MICRO PRODUCTS. NO LICENSE, EXPRESS OR
IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT
AS PROVIDED IN LUMINARY MICRO'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, LUMINARY MICRO ASSUMES NO
LIABILITY WHATSOEVER, AND LUMINARY MICRO DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR
USE OF LUMINARY MICRO'S PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR
PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
LUMINARY MICRO'S PRODUCTS ARE NOT INTENDED FOR USE IN MEDICAL, LIFE SAVING, OR LIFE-SUSTAINING APPLICATIONS.
Luminary Micro may make changes to specifications and product descriptions at any time, without notice. Contact your local Luminary Micro sales office
or your distributor to obtain the latest specifications before placing your product order.
Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Luminary Micro reserves these
for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
Copyright © 2007 Luminary Micro, Inc. All rights reserved. Stellaris is a registered trademark and Luminary Micro and the Luminary Micro logo are
trademarks of Luminary Micro, Inc. or its subsidiaries in the United States and other countries. ARM and Thumb are registered trademarks and Cortex
is a trademark of ARM Limited. Other names and brands may be claimed as the property of others.
Luminary Micro, Inc.
108 Wild Basin, Suite 350
Austin, TX 78746
Main: +1-512-279-8800
Fax: +1-512-279-8879
http://www.luminarymicro.com
2 September 02, 2007
Preliminary



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LM3S8730 Microcontroller
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Table of Contents
About This Document .................................................................................................................... 18
Audience .............................................................................................................................................. 18
About This Manual ................................................................................................................................ 18
Related Documents ............................................................................................................................... 18
Documentation Conventions .................................................................................................................. 18
1
1.1
1.2
1.3
1.4
1.4.1
1.4.2
1.4.3
1.4.4
1.4.5
1.4.6
1.4.7
Architectural Overview ...................................................................................................... 20
Product Features ...................................................................................................................... 20
Target Applications .................................................................................................................... 24
High-Level Block Diagram ......................................................................................................... 25
Functional Overview .................................................................................................................. 26
ARM Cortex™-M3 ..................................................................................................................... 27
Motor Control Peripherals .......................................................................................................... 27
Serial Communications Peripherals ............................................................................................ 28
System Peripherals ................................................................................................................... 29
Memory Peripherals .................................................................................................................. 30
Additional Features ................................................................................................................... 31
Hardware Details ...................................................................................................................... 31
2
2.1
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.2.5
2.2.6
ARM Cortex-M3 Processor Core ...................................................................................... 33
Block Diagram .......................................................................................................................... 34
Functional Description ............................................................................................................... 34
Serial Wire and JTAG Debug ..................................................................................................... 34
Embedded Trace Macrocell (ETM) ............................................................................................. 35
Trace Port Interface Unit (TPIU) ................................................................................................. 35
ROM Table ............................................................................................................................... 35
Memory Protection Unit (MPU) ................................................................................................... 35
Nested Vectored Interrupt Controller (NVIC) ................................................................................ 35
3 Memory Map ....................................................................................................................... 39
4 Interrupts ............................................................................................................................ 41
5
5.1
5.2
5.2.1
5.2.2
5.2.3
5.2.4
5.3
5.4
5.4.1
5.4.2
JTAG Interface .................................................................................................................... 43
Block Diagram .......................................................................................................................... 44
Functional Description ............................................................................................................... 44
JTAG Interface Pins .................................................................................................................. 45
JTAG TAP Controller ................................................................................................................. 46
Shift Registers .......................................................................................................................... 47
Operational Considerations ........................................................................................................ 47
Initialization and Configuration ................................................................................................... 50
Register Descriptions ................................................................................................................ 50
Instruction Register (IR) ............................................................................................................. 50
Data Registers .......................................................................................................................... 52
6
6.1
6.1.1
6.1.2
6.1.3
System Control ................................................................................................................... 54
Functional Description ............................................................................................................... 54
Device Identification .................................................................................................................. 54
Reset Control ............................................................................................................................ 54
Power Control ........................................................................................................................... 57
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6.1.4
6.1.5
6.2
6.3
6.4
7
7.1
7.2
7.2.1
7.2.2
7.2.3
7.2.4
7.2.5
7.2.6
7.2.7
7.3
7.3.1
7.3.2
7.3.3
7.3.4
7.3.5
7.4
7.5
8
8.1
8.2
8.2.1
8.2.2
8.3
8.3.1
8.3.2
8.4
8.5
8.6
9
9.1
9.1.1
9.1.2
9.1.3
9.1.4
9.1.5
9.1.6
9.2
9.3
9.4
10
10.1
Clock Control ............................................................................................................................ 57
System Control ......................................................................................................................... 59
Initialization and Configuration ................................................................................................... 60
Register Map ............................................................................................................................ 60
Register Descriptions ................................................................................................................ 61
Hibernation Module .......................................................................................................... 111
Block Diagram ........................................................................................................................ 112
Functional Description ............................................................................................................. 112
Register Access Timing ........................................................................................................... 112
Clock Source .......................................................................................................................... 113
Battery Management ............................................................................................................... 113
Real-Time Clock ...................................................................................................................... 113
Non-Volatile Memory ............................................................................................................... 114
Power Control ......................................................................................................................... 114
Interrupts and Status ............................................................................................................... 114
Initialization and Configuration ................................................................................................. 115
Initialization ............................................................................................................................. 115
RTC Match Functionality (No Hibernation) ................................................................................ 115
RTC Match/Wake-Up from Hibernation ..................................................................................... 115
External Wake-Up from Hibernation .......................................................................................... 116
RTC/External Wake-Up from Hibernation .................................................................................. 116
Register Map .......................................................................................................................... 116
Register Descriptions .............................................................................................................. 117
Internal Memory ............................................................................................................... 130
Block Diagram ........................................................................................................................ 130
Functional Description ............................................................................................................. 130
SRAM Memory ........................................................................................................................ 130
Flash Memory ......................................................................................................................... 131
Flash Memory Initialization and Configuration ........................................................................... 132
Flash Programming ................................................................................................................. 132
Nonvolatile Register Programming ........................................................................................... 133
Register Map .......................................................................................................................... 133
Flash Register Descriptions (Flash Control Offset) ..................................................................... 134
Flash Register Descriptions (System Control Offset) .................................................................. 141
General-Purpose Input/Outputs (GPIOs) ....................................................................... 154
Functional Description ............................................................................................................. 154
Data Control ........................................................................................................................... 154
Interrupt Control ...................................................................................................................... 155
Mode Control .......................................................................................................................... 156
Commit Control ....................................................................................................................... 156
Pad Control ............................................................................................................................. 156
Identification ........................................................................................................................... 156
Initialization and Configuration ................................................................................................. 156
Register Map .......................................................................................................................... 157
Register Descriptions .............................................................................................................. 159
General-Purpose Timers ................................................................................................. 194
Block Diagram ........................................................................................................................ 195
4 September 02, 2007
Preliminary




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