LM3S817 Datasheet PDF - Luminary Micro


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LM3S817
Luminary Micro

Part Number LM3S817
Description Microcontroller
Page 30 Pages

LM3S817 datasheet pdf
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PRELIMINARY
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LM3S817 Microcontroller
DATA SHEET
DS-LM3S817-02
Copyright © 2007 Luminary Micro, Inc.



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Legal Disclaimers and Trademark Information
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH LUMINARY MICRO PRODUCTS. NO LICENSE,
EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS
DOCUMENT. EXCEPT AS PROVIDED IN LUMINARY MICRO’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS,
LUMINARY MICRO ASSUMES NO LIABILITY WHATSOEVER, AND LUMINARY MICRO DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY, RELATING TO SALE AND/OR USE OF LUMINARY MICRO’S PRODUCTS INCLUDING LIABILITY OR WARRANTIES
RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT
OR OTHER INTELLECTUAL PROPERTY RIGHT. LUMINARY MICRO’S PRODUCTS ARE NOT INTENDED FOR USE IN MEDICAL,
LIFE SAVING, OR LIFE-SUSTAINING APPLICATIONS.
Luminary Micro may make changes to specifications and product descriptions at any time, without notice. Contact your local Luminary Micro
sales office or your distributor to obtain the latest specifications before placing your product order.
Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Luminary Micro
reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to
them.
Copyright © 2007 Luminary Micro, Inc. All rights reserved. Stellaris is a registered trademark and the Luminary Micro logo is a trademark of
Luminary Micro, Inc. or its subsidiaries in the United States and other countries. ARM and Thumb are registered trademarks, and Cortex is a
trademark of ARM Limited. Other names and brands may be claimed as the property of others.
Luminary Micro, Inc.
108 Wild Basin, Suite 350
Austin, TX 78746
Main: +1-512-279-8800
Fax: +1-512-279-8879
http://www.luminarymicro.com
2 May 4, 2007
Preliminary



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LM3S817 Data Sheet
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Table of Contents
Legal Disclaimers and Trademark Information.............................................................................. 2
Revision History ............................................................................................................................. 17
About This Document..................................................................................................................... 18
Audience........................................................................................................................................................... 18
About This Manual............................................................................................................................................ 18
Related Documents .......................................................................................................................................... 18
Documentation Conventions............................................................................................................................. 18
1.
1.1
1.2
1.3
1.4
1.4.1
1.4.2
1.4.3
1.4.4
1.4.5
1.4.6
1.4.7
1.4.8
1.5
Architectural Overview ....................................................................................................... 21
Product Features ................................................................................................................................. 21
Target Applications .............................................................................................................................. 25
High-Level Block Diagram ................................................................................................................... 26
Functional Overview ............................................................................................................................ 27
ARM Cortex™-M3 ............................................................................................................................... 27
Motor Control Peripherals .................................................................................................................... 27
Analog Peripherals .............................................................................................................................. 28
Serial Communications Peripherals..................................................................................................... 28
System Peripherals.............................................................................................................................. 29
Memory Peripherals............................................................................................................................. 30
Additional Features .............................................................................................................................. 30
Hardware Details ................................................................................................................................. 31
System Block Diagram ........................................................................................................................ 32
2.
2.1
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.2.5
2.2.6
ARM Cortex-M3 Processor Core........................................................................................ 33
Block Diagram ..................................................................................................................................... 34
Functional Description ......................................................................................................................... 34
Serial Wire and JTAG Debug .............................................................................................................. 34
Embedded Trace Macrocell (ETM) ...................................................................................................... 35
Trace Port Interface Unit (TPIU) .......................................................................................................... 35
ROM Table .......................................................................................................................................... 35
Memory Protection Unit (MPU) ............................................................................................................ 35
Nested Vectored Interrupt Controller (NVIC) ....................................................................................... 35
3. Memory Map ........................................................................................................................ 41
4. Interrupts ............................................................................................................................. 43
5.
5.1
5.2
5.2.1
5.2.2
5.2.3
5.2.4
5.3
5.4
5.4.1
5.4.2
JTAG Interface .................................................................................................................... 46
Block Diagram ..................................................................................................................................... 47
Functional Description ......................................................................................................................... 47
JTAG Interface Pins............................................................................................................................. 48
JTAG TAP Controller ........................................................................................................................... 49
Shift Registers ..................................................................................................................................... 50
Operational Considerations ................................................................................................................. 50
Initialization and Configuration............................................................................................................. 51
Register Descriptions........................................................................................................................... 52
Instruction Register (IR) ....................................................................................................................... 52
Data Registers ..................................................................................................................................... 54
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3



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6.
6.1
6.1.1
6.1.2
6.1.3
6.1.4
6.1.5
6.2
6.3
6.4
7.
7.1
7.2
7.2.1
7.2.2
7.3
7.3.1
7.3.2
7.4
7.5
8.
8.1
8.2
8.2.1
8.2.2
8.2.3
8.2.4
8.2.5
8.2.6
8.3
8.4
8.5
9.
9.1
9.2
9.2.1
9.2.2
9.2.3
9.3
9.3.1
9.3.2
9.3.3
9.3.4
9.3.5
9.3.6
9.4
9.5
System Control.................................................................................................................... 56
Functional Description ......................................................................................................................... 56
Device Identification............................................................................................................................. 56
Reset Control ....................................................................................................................................... 56
Power Control ...................................................................................................................................... 59
Clock Control ....................................................................................................................................... 59
System Control .................................................................................................................................... 61
Initialization and Configuration............................................................................................................. 62
Register Map ....................................................................................................................................... 62
Register Descriptions........................................................................................................................... 63
Internal Memory .................................................................................................................. 98
Block Diagram ..................................................................................................................................... 98
Functional Description ......................................................................................................................... 98
SRAM Memory .................................................................................................................................... 98
Flash Memory ...................................................................................................................................... 99
Initialization and Configuration........................................................................................................... 101
Changing Flash Protection Bits ......................................................................................................... 101
Flash Programming ........................................................................................................................... 102
Register Map ..................................................................................................................................... 102
Register Descriptions......................................................................................................................... 103
General-Purpose Input/Outputs (GPIOs) ........................................................................ 115
Block Diagram ................................................................................................................................... 116
Functional Description ....................................................................................................................... 116
Data Register Operation .................................................................................................................... 117
Data Direction .................................................................................................................................... 118
Interrupt Operation............................................................................................................................. 118
Mode Control ..................................................................................................................................... 119
Pad Configuration .............................................................................................................................. 119
Identification....................................................................................................................................... 119
Initialization and Configuration........................................................................................................... 119
Register Map ..................................................................................................................................... 121
Register Descriptions......................................................................................................................... 122
General-Purpose Timers .................................................................................................. 153
Block Diagram ................................................................................................................................... 154
Functional Description ....................................................................................................................... 154
GPTM Reset Conditions .................................................................................................................... 154
32-Bit Timer Operating Modes........................................................................................................... 154
16-Bit Timer Operating Modes........................................................................................................... 156
Initialization and Configuration........................................................................................................... 160
32-Bit One-Shot/Periodic Timer Mode ............................................................................................... 160
32-Bit Real-Time Clock (RTC) Mode ................................................................................................. 161
16-Bit One-Shot/Periodic Timer Mode ............................................................................................... 161
16-Bit Input Edge Count Mode .......................................................................................................... 161
16-Bit Input Edge Timing Mode ......................................................................................................... 162
16-Bit PWM Mode.............................................................................................................................. 162
Register Map ..................................................................................................................................... 163
Register Descriptions......................................................................................................................... 164
4 May 4, 2007
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