LM3S800 Datasheet PDF - Luminary Micro


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LM3S800
Luminary Micro

Part Number LM3S800
Description Microcontroller
Page 30 Pages

LM3S800 datasheet pdf
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PRELIMINARY
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LM3S800 Microcontroller
DATA SHEET
DS-LM3S800-1972
Copyright © 2007 Luminary Micro, Inc.



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Legal Disclaimers and Trademark Information
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH LUMINARY MICRO PRODUCTS. NO LICENSE, EXPRESS OR
IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT
AS PROVIDED IN LUMINARY MICRO'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, LUMINARY MICRO ASSUMES NO
LIABILITY WHATSOEVER, AND LUMINARY MICRO DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR
USE OF LUMINARY MICRO'S PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR
PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
LUMINARY MICRO'S PRODUCTS ARE NOT INTENDED FOR USE IN MEDICAL, LIFE SAVING, OR LIFE-SUSTAINING APPLICATIONS.
Luminary Micro may make changes to specifications and product descriptions at any time, without notice. Contact your local Luminary Micro sales office
or your distributor to obtain the latest specifications before placing your product order.
Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Luminary Micro reserves these
for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
Copyright © 2007 Luminary Micro, Inc. All rights reserved. Stellaris, Luminary Micro, and the Luminary Micro logo are registered trademarks of
Luminary Micro, Inc. or its subsidiaries in the United States and other countries. ARM and Thumb are registered trademarks and Cortex is a trademark
of ARM Limited. Other names and brands may be claimed as the property of others.
Luminary Micro, Inc.
108 Wild Basin, Suite 350
Austin, TX 78746
Main: +1-512-279-8800
Fax: +1-512-279-8879
http://www.luminarymicro.com
2 November 29, 2007
Preliminary



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LM3S800 Microcontroller
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Table of Contents
About This Document .................................................................................................................... 15
Audience .............................................................................................................................................. 15
About This Manual ................................................................................................................................ 15
Related Documents ............................................................................................................................... 15
Documentation Conventions .................................................................................................................. 15
1
1.1
1.2
1.3
1.4
1.4.1
1.4.2
1.4.3
1.4.4
1.4.5
1.4.6
1.4.7
1.4.8
Architectural Overview ...................................................................................................... 17
Product Features ...................................................................................................................... 17
Target Applications .................................................................................................................... 21
High-Level Block Diagram ......................................................................................................... 21
Functional Overview .................................................................................................................. 22
ARM Cortex™-M3 ..................................................................................................................... 23
Motor Control Peripherals .......................................................................................................... 23
Analog Peripherals .................................................................................................................... 24
Serial Communications Peripherals ............................................................................................ 24
System Peripherals ................................................................................................................... 25
Memory Peripherals .................................................................................................................. 26
Additional Features ................................................................................................................... 27
Hardware Details ...................................................................................................................... 27
2
2.1
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.2.5
2.2.6
ARM Cortex-M3 Processor Core ...................................................................................... 28
Block Diagram .......................................................................................................................... 29
Functional Description ............................................................................................................... 29
Serial Wire and JTAG Debug ..................................................................................................... 29
Embedded Trace Macrocell (ETM) ............................................................................................. 30
Trace Port Interface Unit (TPIU) ................................................................................................. 30
ROM Table ............................................................................................................................... 30
Memory Protection Unit (MPU) ................................................................................................... 30
Nested Vectored Interrupt Controller (NVIC) ................................................................................ 30
3 Memory Map ....................................................................................................................... 34
4 Interrupts ............................................................................................................................ 36
5
5.1
5.2
5.2.1
5.2.2
5.2.3
5.2.4
5.3
5.4
5.4.1
5.4.2
JTAG Interface .................................................................................................................... 38
Block Diagram .......................................................................................................................... 39
Functional Description ............................................................................................................... 39
JTAG Interface Pins .................................................................................................................. 40
JTAG TAP Controller ................................................................................................................. 41
Shift Registers .......................................................................................................................... 42
Operational Considerations ........................................................................................................ 42
Initialization and Configuration ................................................................................................... 43
Register Descriptions ................................................................................................................ 44
Instruction Register (IR) ............................................................................................................. 44
Data Registers .......................................................................................................................... 46
6
6.1
6.1.1
6.1.2
System Control ................................................................................................................... 48
Functional Description ............................................................................................................... 48
Device Identification .................................................................................................................. 48
Reset Control ............................................................................................................................ 48
November 29, 2007
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6.1.3
6.1.4
6.1.5
6.2
6.3
6.4
7
7.1
7.2
7.2.1
7.2.2
7.3
7.3.1
7.3.2
7.4
7.5
7.6
8
8.1
8.1.1
8.1.2
8.1.3
8.1.4
8.1.5
8.2
8.3
8.4
9
9.1
9.2
9.2.1
9.2.2
9.2.3
9.3
9.3.1
9.3.2
9.3.3
9.3.4
9.3.5
9.3.6
9.4
9.5
10
10.1
10.2
10.3
10.4
Power Control ........................................................................................................................... 51
Clock Control ............................................................................................................................ 51
System Control ......................................................................................................................... 54
Initialization and Configuration ................................................................................................... 54
Register Map ............................................................................................................................ 55
Register Descriptions ................................................................................................................ 56
Internal Memory ............................................................................................................... 103
Block Diagram ........................................................................................................................ 103
Functional Description ............................................................................................................. 103
SRAM Memory ........................................................................................................................ 103
Flash Memory ......................................................................................................................... 104
Flash Memory Initialization and Configuration ........................................................................... 106
Changing Flash Protection Bits ................................................................................................ 106
Flash Programming ................................................................................................................. 107
Register Map .......................................................................................................................... 107
Flash Register Descriptions (Flash Control Offset) ..................................................................... 108
Flash Register Descriptions (System Control Offset) .................................................................. 115
General-Purpose Input/Outputs (GPIOs) ....................................................................... 119
Functional Description ............................................................................................................. 119
Data Control ........................................................................................................................... 120
Interrupt Control ...................................................................................................................... 121
Mode Control .......................................................................................................................... 122
Pad Control ............................................................................................................................. 122
Identification ........................................................................................................................... 122
Initialization and Configuration ................................................................................................. 122
Register Map .......................................................................................................................... 123
Register Descriptions .............................................................................................................. 125
General-Purpose Timers ................................................................................................. 157
Block Diagram ........................................................................................................................ 157
Functional Description ............................................................................................................. 158
GPTM Reset Conditions .......................................................................................................... 158
32-Bit Timer Operating Modes .................................................................................................. 159
16-Bit Timer Operating Modes .................................................................................................. 160
Initialization and Configuration ................................................................................................. 164
32-Bit One-Shot/Periodic Timer Mode ....................................................................................... 164
32-Bit Real-Time Clock (RTC) Mode ......................................................................................... 165
16-Bit One-Shot/Periodic Timer Mode ....................................................................................... 165
16-Bit Input Edge Count Mode ................................................................................................. 166
16-Bit Input Edge Timing Mode ................................................................................................ 166
16-Bit PWM Mode ................................................................................................................... 167
Register Map .......................................................................................................................... 167
Register Descriptions .............................................................................................................. 168
Watchdog Timer ............................................................................................................... 193
Block Diagram ........................................................................................................................ 193
Functional Description ............................................................................................................. 193
Initialization and Configuration ................................................................................................. 194
Register Map .......................................................................................................................... 194
4 November 29, 2007
Preliminary




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