LC863520B Datasheet PDF - Sanyo Semicon Device


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LC863520B
Sanyo Semicon Device

Part Number LC863520B
Description (LC8635xxB) 8-bit 1-chip Microcontroller
Page 17 Pages

LC863520B datasheet pdf
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CMOS IC
FROM 48K/40K/32K/28K/24K/20K/16K-byte,
RAM 640/512-byte on-chip and 176 × 9-bit OSD RAM
8-bit 1-chip Microcontroller
LC863516B omOverview
.cThe LC863548/40/32/28/24/20/16B are 8-bit single chip microcontrollers with the following on-chip functional blocks :
CPU : Operable at a minimum bus cycle time of 0.424µs
UOn-chip ROM capacity
Program ROM : 48K/40K/32K/28K/24K/20K/16K-bytes
t4CGROM
: 16K-bytes
On-chip RAM capacity : 640/512-bytes
eOSD RAM : 176 × 9-bits
On-screen display controller
eFour channels × 6-bit AD Converter
hThree channels × 7-bit PWM
Two channels × 16-bit timer/counter, 14-bit base timer
SIIC-bus compliant serial interface circuit (Multi-master type)
ROM correction function
ta13-source 8-vectored interrupt system
Integrated system clock generator and display clock generator
aOnly one X’tal oscillator (32.768kHz) for PLL reference is used for both generators.
www.DAll of the above functions are fabricated on a single chip.
Ver.0.92
62102
www.DataSheet4U.com73004 JO IM No.7936-1/17



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LC863548B/40B/32B/28B/24B/20B/16B
Features
Read-Only Memory (ROM)
: 49152 × 8-bits/40960 × 8-bits/32768 × 8-bits/
28672 × 8-bits/24576 × 8-bits/20480 × 8-bits/
16384 × 8-bits for program
16128 × 8-bits for CGROM
Random Access Memory (RAM)
: 512 × 8-bits (working area) : LC863548B/40B
384 × 8-bits (working area) : LC863532B/28B/24B/20B/16B
128 × 8-bits (working or ROM correction function)
176 × 9-bits (for CRT display)
OSD functions
Screen display : 36 characters × 8 lines (by software)
RAM
: 176 words (9-bits per word)
Display area : 36 words × 4 lines
Control area : 8 words × 4 lines
Characters
Up to 252 kinds of 16 × 32 dot character fonts (4 characters including 1 test character are not programmable)
Each font can be divided into two parts and used as two fonts (Ex. 16 × 16 dot character font × 2)
Various character attributes
Character colors
: 16 colors (analog mode : l Vp-p output) /8 colors (digital mode)
Character background colors : 16 colors (analog mode : l Vp-p output) /8 colors (digital mode)
Fringe/shadow colors
: 16 colors (analog mode : l Vp-p output) /8 colors (digital mode)
Full screen colors
: 16 colors (analog mode : l Vp-p output) /8 colors (digital mode)
Rounding
Underline
Italic character (slanting)
Attribute can be changed without spacing
Vertical display start line number can be set for each row independently (Rows can be overlapped)
Horizontal display start position can be set for each row independently
Horizontal pitch (bit 9 to 16) *1 and vertical pitch (bit 1 to 32) can be set for each row independently
Different display modes can be set for each row independently
Caption Text mode/OSD mode 1/OSD mode 2 (Quarter size) /Simplified graphic mode
Ten character sizes *1
Horez. × Vert. = (1 × 1), (1 × 2), (2 × 2), (2 × 4), (0.5 × 0.5)
(1.5 × 1), (1.5 × 2), (3 × 2), (3 × 4), (0.75 × 0.5)
Shuttering and scrolling on each row
Simplified Graphic Display
*1 Note : range depends on display mode : refer to the manual for details.
Bus Cycle Time/Instruction-Cycle Time
Bus cycle time
Instruction cycle time Clock divider
0.424µs
0.848µs
1/2
7.5µs
91.55µs
183.1µs
15.0µs
183.1µs
366.2µs
1/2
1/1
1/2
System clock oscillation
Internal VCO
(Ref : X'tal 32.768kHz)
Internal RC
Crystal
Crystal
Oscillation frequency
14.156MHz
800kHz
32.768kHz
32.768kHz
Voltage
4.5V to 5.5V
4.5V to 5.5V
4.5V to 5.5V
4.5V to 5.5V
Ports
Input/Output Ports
: 4 ports (24 terminals)
Data direction programmable in nibble units
: 1 port (8 terminals)
(If the N-ch open drain output is selected by option, the corresponding port data can be read in output mode.)
Data direction programmable for each bit individually : 3 ports (16 terminals)
AD converter
4-channels × 6-bit AD converters
No.7936-2/17



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LC863548B/40B/32B/28B/24B/20B/16B
Serial interfaces
IIC-bus compliant serial interface (Multi-master type)
Consists of a single built-in circuit with two I/O channels. The two data lines and two clock lines can be connected
internally.
PWM output
3-channels × 7-bit PWM
Timer
Timer 0 : 16-bit timer/counter
With 2-bit prescaler + 8-bit programmable prescaler
Mode 0 : Two 8-bit timers with a programmable prescaler
Mode 1 : 8-bit timer with a programmable prescaler + 8-bit counter
Mode 2 : 16-bit timer with a programmable prescaler
Mode 3 : 16-bit counter
The resolution of timer is 1 tCYC.
Timer 1 : 16-bit timer/ PWM
Mode 0 : Two 8-bit timers
Mode 1 : 8-bit timer + 8-bit PWM
Mode 2 : 16-bit timer
Mode 3 : A variable-bit PWM (9 to 16 bits)
In mode 0/1, the resolution of timer/PWM is 1 tCYC
In mode 2/3, the resolution of timer/PWM is selectable by program ; tCYC or 1/2 tCYC
Base timer
Generate every 500ms overflow for a clock application
(using 32.768kHz crystal oscillation for the base timer clock)
Generate every 976µs, 3.9ms, 15.6ms, 62.5ms overflow
(using 32.768kHz crystal oscillation for the base timer clock)
Clock for the base timer is selectable from 32.768kHz crystal oscillation, system clock or programmable prescaler
output of Timer 0
Remote control receiver circuit (connected to the P73/INT3/T0IN terminal)
Noise rejection function
Polarity switching
Watchdog timer
External RC circuit is required
Interrupt or system reset is activated when the timer overflows
ROM correction function
Max 128-bytes/2 addresses
Interrupts
13 sources 8 vectored interrupts
1. External Interrupt INT0
2. External Interrupt INT1
3. External Interrupt INT2, Timer/counter T0L (Lower 8-bits)
4. External Interrupt INT3, base timer
5. Timer/counter T0H (Upper 8-bits)
6. Timer T1H, Timer T1L
7. Vertical synchronous signal interrupt (VS), horizontal line (HS)
9. IIC, Software
Interrupt priority control
Three interrupt priorities are supported (low, high and highest) and multi-level nesting is possible.
Low or high priority can be assigned to the interrupts from 3 to 8 listed above.
For the external interrupt INT0 and INT1, low or highest priority can be set.
No.7936-3/17



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LC863548B/40B/32B/28B/24B/20B/16B
Sub-routine stack level
A maximum of 128 levels (stack is built in the internal RAM)
Multiplication/division instruction
16-bits × 8-bits (7 instruction cycle times)
16-bits ÷ 8-bits (7 instruction cycle times)
3 oscillation circuits
Built-in RC oscillation circuit used for the system clock
Built-in VCO circuit used for the system clock and OSD
X’tal oscillation circuit used for base timer, system clock and PLL reference
Standby function
HALT mode
The HALT mode is used to reduce the power dissipation. In this operation mode, the program execution is stopped.
This mode can be released by the interrupt request or the system reset.
HOLD mode
The HOLD mode is used to stop the oscillations ; RC (internal), VCO, and X’tal oscillations.
This mode can be released by the following conditions.
1. Pull the reset terminal (RES) to low level.
2. Feed the selected level to either P70/INT0 or P71/INT1.
Package
MFP36S
DIP36S
Development tools
Flash EEPROM
Evaluation chip
Emulator
: LC86F3548A
: LC863096
: EVA86000 (main) + ECB863200A (evaluation chip board)
+ SUB863400A (sub board)
+ POD36-CABLE (cable)
+ POD36-DIP (for DIP36S)
or POD36-MFP (for MFP36S)
No.7936-4/17




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