LC786821E Datasheet PDF - ON Semiconductor

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Part Number LC786821E
Description Compressed Audio Signal Processor IC
Page 30 Pages

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Compressed Audio Signal Processor IC
with USB Host Controller and Bluetooth
The LC786821E integrates ARM7TDMI-S™, USB host processing, SD
memory card host processing, compressed audio decode processing, audio
signal processing and a flash memory which stores the program for
ARM7TDMI-S™ and the various data. The sophisticated programs in the
flash memory for the USB host processing for the SD memory card
processing or audio signal processing etc. make the process of external main
microcontroller easier and very helpful to develop a much features/high
performance audio player system.
Main Features
1. USB host/device function (Full speed: 12Mbps),
SD memory card host function
2. MP3*, WMA*, AAC*, FLAC*, SBC* decoder processing function
3. Audio input functions such as Analog (stereo 3ch)/digital 3ch input
(Sampling rate convertible)
4. Audio processing functions such as 20 bands equalizer (stereo 1ch),
subwoofer processing, high-frequency range extendable filter and etc.
5. Audio output functions such as Electronical Volume output 5 ch
(for LF, LR, RF, RR, SW), or DAC output 3ch (Lch, Rch, SW)
6. ARM7TDMI-S™ as internal CPU core, flash memory for program and
various data storage
7. Bluetooth* Audio processing/Hands-free function
8. Operational voltage source: 3.3V single power supply
9. Operational temperature: 40 to +85 C
10. Package: QIP100E (1420) Pb-Free and Halogen Free type
PQFP100 14x20 / QIP100E
* MP3
MPEG Layer-3 Audio Coding
Windows Media Audio
Advanced Audio Coding
Free Lossless Audio Codec
SubBand Codec
*Bluetooth profile
Copyright 1999-2014 OpenSynergy GmbH
All rights reserved. All unpublished rights reserved.
* This product is licensed from Silicon Storage Technology, Inc. (USA).
© Semiconductor Components Industries, LLC, 2016
June 2016 - Rev. 1
Publication Order Number:

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Detail Functions
[ Compressed audio functions ]
<Audio processing block>
MP3 decode (ISO/IEC 11172-3, ISO/IEC 13818-3)
Supported sampling rate : MPEG1-Layer1/2/3 (32kHz, 44.1kHz, 48kHz)
MPEG2-Layer1/2/3 (16kHz, 22.05kHz, 24kHz)
MPEG2.5-Layer3 ( 8kHz, 11.025kHz, 12kHz)
Supported bit rate
: All Bit Rate (Variable Bit Rate support)
MPEG header read supported
WMA decode (Version 9.2 standard)
Supported sampling rate : 8kHz to 48kHz
Supported bit rate
: 5kbps to 384kbps (Variable Bit Rate support)
AAC decode (ISO/IEC 14496-3, ISO/IEC 13818-7)
: MPEG4-AAC-LowComplexity
Supported sampling rate : 8kHz to 48kHz
Supported bit rate
: Monaural 8kbps to 160kbps (Variable bit rate support)
Stereo 16kbps to 320kbps (Variable bit rate support)
* Depending on the condition, sampling rate can be supported up to 96kHz.
FLAC decode (FLAC 1.3.0)
Supported format
: Block size: up to 4608
Quantized number of bits: 8/16/24 bit per sample
Supported sampling rate : 8kHz to 48kHz
Supported channel
: 1/2ch
SBC decode (Bluetooth A2DP Ver1.2)
Supported format
: Block length: 4/8/12/16, Sub-band : 4/8, SNR/Loudness
Supported sampling rate : 16kHz, 32kHz, 44.1kHz and 48kHz
Supported bit rate
: up to 512kbps
modifiedSBC (mSBC)
Capable of voice processing with WBS (WideBandSpeech): Fx=16kHz by supporting the mSBC
encode/decode function
[ Audio processing functions ]
<Audio data digital processing block>
Equalizer function
Supports max of 20-band (stereo 1ch) and unused band can be used for not only the voice output but also
used for other processing
Supports signal processing for subwoofer
Sampling conversion (Fs=32/44.1/48kHz) when playing compressed audio, High band extended
processing supported
Mute (/12dB), attenuator
De-emphasis filter
Embedded level/peak hold circuit and can hold up to 8 data
Noise cancel/Echo cancel function
Supports noise cancel/echo cancel at Fs=8kHz
Supports input/output of Fs=16kHz voice data
<Audio input processing block>
Analog Audio data input (3-channels by stereo)
Single Ended input
: 2 channels
Differential input
: 1 channel
Input Gain
: 12.5dB to +18.5dB (1dB step)
24bit accuracy AD converter
Digital audio input (Stereo input: Max of 3 channels)
Supports digital 3-line (LR clock, bit clock, audio data) connection and clock can be master or slave
Data format supports IIS/MSB first right justified and etc.
Input data can support 8kHz to 96kHz, and by sampling conversion, converts to the suitable Fs
(Playback Fs=32/44.1/48kHz etc.)

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<Audio output processing block>
Analog Audio data output (One channel for stereo, and one channel for Sub-Woofer)
Eight-fold over-sampling digital filter (24bit)
Secondary LPF for audio output
Electronic Volume/Fader
5ch outputs (Lch-Front (LF)/Rear (LR), Rch-Front (RF)/Rear (RR), Sub-Woofer)
Output Range: 0dB to 0dB, 
0dB to 32dB
: Analog control, 0.25dB step
32dB to 70dB
: Analog control, 1.0dB step
70dB to 90dB
: Digital attenuator control
Decrease the noise at the volume change timing by the digital and analog composite control.
Individual output for 5 channels control is available
Digital Audio data output
Digital 3-line interface with IIS/MSB first right justification and etc.
LR clock, Bit clock, Data 1
Clock can be master or slave
Capable of outputting 384Fs clock
[ External interface functions ]
<USB host/device control block>
Open Host Controller Interface 1.0a
Universal Serial Bus Specification 2.0 Full Speed
Supports four kinds of transfer type (Control/Bulk/Interrupt/Isochronous)
Supports 2 Ports. USB1=Host or Device, USB2=Host only
USB Charger (USB1 only)
Supports detection of CDP (Charging Downstream Port) of USB Charger Specification 1.2
Charge (supplying current) is not supported
PHY block: Internal Pull-Down/Pull-Up resisters built-in
<SD memory card host control block>
Multimedia Card Specification v2.11
Secure Digital Memory Card Physical Layer Specification v0.96
* Individual contract is necessary to use SD memory card controller.
[ Internal Microcontroller functions ]
<Sequencer control>
USB, SD memory card playback/write control
USB/SD files analysis, etc.
Audio playback control
Compressed audio playback control, various filter control and etc.
<Communication control between main controller>
Main communication format is SIO (4-line)
Capable of direct control of oscillation stop/start from main microcontroller
Capable of some special command can be used even when oscillation is stopped
<Peripheral interface block>
GPIO ports
37 ports maximum
(Shared with other functions. Some part of pins can be used even when the clock is halted)
External interrupt pins 4 pins maximum (Shared with other functions)
Serial interface
clock synchronized full duplex (3 lines)
3 channels
full duplex
2 channels
IIC master function
1 channel
<Program memory block>
Program memory for the internal sequencer built-in
Program version up from the external media (USB and etc.) or main controller is available.

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Watch Dog Timer
Notify to outside from the pin or internal reset.
Sleep Mode (2 kinds)
(1) Only CPU core operates at slow clock and clocks for other blocks are stopped.
(2) All clocks are stopped by the main microcontroller control.
[ Useful functions for CD-DSP IC connection usage ]
<CD TEXT processing block>
Buffers CD-TEXT data
Starts buffering from desired ID3/ID4 of CD-TEXT data.
* Needs to connect subcode synchronization signals (SBSY and SFSY), shift clock (SBCK) and data (PW).
<CD-ROM processing block>
Up to 4speed operation available
Supports CD-ROM decoding (Mode1, Mode2 <form1, form2>)
Supports output of CD-ROM decoded data
* Needs to connect three signals (LRCK, BCK and DATA).
It is possible to connect C2 error flag if needed.
[ Others ]
<Internal power supply>
Regulator for internal blocks (VDD for internal=1.2V, VDD for Flash=1.8V) built-in

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