KM23C4000DG Datasheet PDF - Samsung semiconductor

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KM23C4000DG
Samsung semiconductor

Part Number KM23C4000DG
Description 4M-Bit (512Kx8) CMOS MASK ROM
Page 4 Pages


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KM23C4000D(G)
4M-Bit (512Kx8) CMOS MASK ROM
FEATURES
524,288x8 bit organization
Access time : 80ns(Max.)
Supply voltage : single +5V
Current consumption
Operating : 50mA(Max.)
Standby : 50µA(Max.)
Fully static operation
All inputs and outputs TTL compatible
Three state outputs
Package
-. KM23C4000D : 32-DIP-600
-. KM23C4000DG : 32-SOP-525
CMOS MASK ROM
GENERAL DESCRIPTION
The KM23C4000D(G) is a fully static mask programmable
ROM organized 524,288 x 8 bit. It is fabricated using silicon
gate CMOS process technology.
This device operates with a 5V single power supply, and all
inputs and outputs are TTL compatible.
Because of its asynchronous operation, it requires no external
clock assuring extremely easy operation.
It is suitable for use in program memory of microprocessor, and
data memory, character generator.
The KM23C4000D is packaged in a 32-DIP and the
KM23C4000DG in a 32-SOP.
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATION
A18
.
.
.
.
.
.
.
.
A0
X
BUFFERS
AND
DECODER
Y
BUFFERS
AND
DECODER
CE CONTROL
OE LOGIC
MEMORY CELL
MATRIX
(524,288x8)
SENSE AMP.
BUFFERS
...
Q0 Q7
Pin Name
A0 - A18
Q0 - Q7
CE
OE
VCC
VSS
N.C
Pin Function
Address Inputs
Data Outputs
Chip Enable
Output Enable
Power(+5V)
Ground
No Connection
N.C 1
A16 2
A15 3
A12 4
A7 5
A6 6
A5 7
A4 8
A3 9
A2 10
A1 11
A0 12
Q0 13
Q1 14
Q2 15
VSS 16
DIP
&
SOP
32 VCC
31 A18
30 A17
29 A14
28 A13
27 A8
26 A9
25 A11
24 OE
23 A10
21 CE
21 Q7
20 Q6
19 Q5
18 Q4
17 Q3
KM23C4000D(G)



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KM23C4000D(G)
CMOS MASK ROM
ABSOLUTE MAXIMUM RATINGS
Item
Voltage on Any Pin Relative to VSS
Temperature Under Bias
Storage Temperature
Symbol
VIN
TBIAS
TSTG
Rating
-0.3 to +7.0
-10 to +85
-55 to +150
Unit
V
°C
°C
NOTE : Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to the
conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may
affect device reliability.
RECOMMENDED OPERATING CONDITIONS(Voltage reference to VSS, TA=0 to 70°C)
Item
Symbol
Min
Typ
Max
Supply Voltage
VCC
4.5
5.0
5.5
Supply Voltage
VSS 0 0 0
Unit
V
V
DC CHARACTERISTICS
Parameter
Operating Current
Standby Current(TTL)
Standby Current(CMOS)
Input Leakage Current
Output Leakage Current
Input High Voltage, All Inputs
Input Low Voltage, All Inputs
Output High Voltage Level
Output Low Voltage Level
Symbol
ICC
ISB1
ISB2
ILI
ILO
VIH
VIL
VOH
VOL
Test Conditions
CE=OE=VIL, all outputs open
CE=VIH, all outputs open
CE=VCC, all outputs open
VIN=0 to VCC
VOUT=0 to VCC
IOH=-400µA
IOL=2.1mA
Min Max
- 50
-1
- 50
- 10
- 10
2.2 VCC+0.3
-0.3 0.8
2.4 -
- 0.4
NOTE : Minimum DC Voltage(VIL) is -0.3V an input pins. During transitions, this level may undershoot to -2.0V for periods <20ns.
Maximum DC voltage(VIH) is VCC+0.3V which, during transitions, may overshoot to VCC+2.0V for periods <20ns.
Unit
mA
mA
µA
µA
µA
V
V
V
V
MODE SELECTION
CE
H
L
OE
X
H
L
Mode
Standby
Operating
Operating
Data
High-Z
High-Z
Dout
Power
Standby
Active
Active
CAPACITANCE(TA=25°C, f=1.0MHz)
Item
Symbol
Output Capacitance
Input Capacitance
COUT
CIN
NOTE : Capacitance is periodically sampled and not 100% tested.
Test Conditions
VOUT=0V
VIN=0V
Min
-
-
Max
10
10
Unit
pF
pF



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KM23C4000D(G)
CMOS MASK ROM
AC CHARACTERISTICS(TA=0°C to +70°C, VCC=5V±10%, unless otherwise noted.)
TEST CONDITIONS
Item
Input Pulse Levels
Input Rise and Fall Times
Input and Output timing Levels
Output Loads
Value
0.6V to 2.4V
10ns
0.8V and 2.0V
1 TTL Gate and CL=100pF
READ CYCLE
Item
Symbol
Read Cycle Time
Chip Enable Access Time
Address Access Time
Output Enable Access Time
Output or Chip Disable to
Output High-Z
Output Hold from Address Change
tRC
tACE
tAA
tOE
tDF
tOH
KM23C4000D(G)-8
Min Max
80
80
80
40
20
0
KM23C4000D(G)-10
Min Max
100
100
100
50
KM23C4000D(G)-12
Min Max
120
120
120
60
20 20
00
Unit
ns
ns
ns
ns
ns
ns
TIMING DIAGRAM
READ
ADD
CE
OE
DOUT
ADD1
tACE
tRC
tOE
ADD2
tAA
VALID DATA
tOH
VALID DATA
tDF(Note)
NOTE : tDF is defined as the time at which the outputs achieve the open circuit condition and is not referenced to VOH or
VOL level.



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KM23C4000D(G)
PACKAGE DIMENSIONS
32-DIP-600
#32
13.60±0.20
0.535±0.008
#1
42.31
1.666 MAX
4.191±0.20
1.650±0.008
CMOS MASK ROM
(Unit : mm/inch)
0.25
+0.10
-0.05
0.010+-00..000024
#17
#16 0~15°
3.81±0.20
0.150±0.008
5.08
0.200
MAX
(
1.91
0.075
)
32-SOP-525
#32
0.46±0.10
0.018±0.004
1.52±0.10
0.060±0.004
2.54
0.100
#17
3.30±0.30
0.130±0.012
0.38
0.015 MIN
(Unit : mm/inch)
0~8°
14.12±0.30 11.43±0.20
0.556±0.012 0.450±0.008
#1
(
0.71
0.028
)
20.87
0.822MAX
20.47±0.20
0.806±0.008
0.41
+0.100
-0.050
0.016+-00..000024
#16
0.20
+0.10
-0.05
0.008
+0.004
-0.002
2.74±0.20
0.108±0.008
3.00
0.118MAX
0.10 MAX
0.004 MAX
1.27
0.050
0.05
0.002
MIN
0.80±0.20
0.031±0.008



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