KH29LV800CT Datasheet PDF - Macronix


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KH29LV800CT
Macronix

Part Number KH29LV800CT
Description 8M-Bit CMOS Single Voltage 3V Only Flash Memory
Page 30 Pages

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KH29LV800C T/B
FEATURES
8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE
3V ONLY FLASH MEMORY
• Extended single - supply voltage range 2.7V to 3.6V
• 1,048,576 x 8/524,288 x 16 switchable
• Single power supply operation
- 3.0V only operation for read, erase and program
operation
• Fast access time: 70/90ns
• Low power consumption
- 20mA maximum active current
- 0.2uA typical standby current
• Command register architecture
- Byte/word Programming (9us/11us typical)
- Sector Erase (Sector structure 16K-Bytex1,
8K-Bytex2, 32K-Bytex1, and 64K-Byte x15)
• Auto Erase (chip & sector) and Auto Program
- Automatically erase any combination of sectors with
Erase Suspend capability
- Automatically program and verify data at specified
address
• Erase suspend/Erase Resume
- Suspends sector erase operation to read data from,
or program data to, any sector that is not being erased,
then resumes the erase
• Status Reply
- Data# polling & Toggle bit for detection of program
and erase operation completion.
• Ready/Busy# pin (RY/BY#)
- Provides a hardware method of detecting program or
erase operation completion
• Sector protection
- Hardware method to disable any combination of
sectors from program or erase operations
- Temporary sector unprotected allows code changes
in previously locked sectors
• CFI (Common Flash Interface) compliant
- Flash device parameters stored on the device and
provide the host system to access
• 100,000 minimum erase/program cycles
• Latch-up protected to 100mA from -1V to VCC+1V
• Boot Sector Architecture
- T = Top Boot Sector
- B = Bottom Boot Sector
• Package type:
- 48-pin TSOP
- All Pb-free devices are RoHS Compliant
• Compatibility with JEDEC standard
- Pinout and software compatible with single-power
supply Flash
• 10 years data retentionwww.DataSheet.co.kr
GENERAL DESCRIPTION
The KH29LV800C T/B is a 8-mega bit Flash memory
organized as 1M bytes of 8 bits or 512K words of 16
bits. MXIC's Flash memories offer the most cost-effec-
tive and reliable read/write non-volatile random access
memory. The KH29LV800C T/B is packaged in 48-pin
TSOP. It is designed to be reprogrammed and erased in
system or in standard EPROM programmers.
The standard KH29LV800C T/B offers access time as
fast as 55ns, allowing operation of high-speed micropro-
cessors without wait states. To eliminate bus conten-
tion, the KH29LV800C T/B has separate chip enable
(CE#) and output enable (OE#) controls.
MXIC's Flash memories augment EPROM functionality
with in-circuit electrical erasure and programming. The
KH29LV800C T/B uses a command register to manage
this functionality. The command register allows for 100%
TTL level control inputs and fixed power supply levels
during erase and programming, while maintaining maxi-
mum EPROM compatibility.
MXIC Flash technology reliably stores memory contents
even after 100,000 erase and program cycles. The MXIC
cell is designed to optimize the erase and programming
mechanisms. In addition, the combination of advanced
tunnel oxide processing and low internal electric fields
for erase and program operations produces reliable cy-
cling. The KH29LV800C T/B uses a 2.7V~3.6V VCC
supply to perform the High Reliability Erase and auto
Program/Erase algorithms.
The highest degree of latch-up protection is achieved
with MXIC's proprietary non-epi process. Latch-up pro-
tection is proved for stresses up to 100 milliamperes on
address and data pin from -1V to VCC + 1V.
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KH29LV800C T/B
PIN CONFIGURATIONS
48 TSOP (Standard Type) (12mm x 20mm)
A15
A14
A13
A12
A11
A10
A9
A8
NC
NC
WE#
RESET#
NC
NC
RY/BY#
A18
A17
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
KH29LV800C T/B
48 A16
47 BYTE#
46 GND
45 Q15/A-1
44 Q7
43 Q14
42 Q6
41 Q13
40 Q5
39 Q12
38 Q4
37 VCC
36 Q11
35 Q3
34 Q10
33 Q2
32 Q9
31 Q1
30 Q8
29 Q0
28 OE#
27 GND
26 CE#
25 A0
PIN DESCRIPTION
SYMBOL PIN NAME
A0~A18 Address Input
Q0~Q14 Data Input/Output
Q15/A-1 Q15(Word mode)/LSB addr(Byte mode)
CE# Chip Enable Input
WE#
Write Enable Input
BYTE# Word/Byte Selection input
RESET# Hardware Reset Pin
OE# Output Enable Input
RY/BY# Ready/Busy Output
VCC
Power Supply Pin (2.7V~3.6V)
GND
Ground Pin
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KH29LV800C T/B
BLOCK STRUCTURE
TABLE 1: KH29LV800CT SECTOR ARCHITECTURE
Sector
Sector Size
Byte Mode Word Mode
SA0 64Kbytes 32Kwords
SA1 64Kbytes 32Kwords
SA2 64Kbytes 32Kwords
SA3 64Kbytes 32Kwords
SA4 64Kbytes 32Kwords
SA5 64Kbytes 32Kwords
SA6 64Kbytes 32Kwords
SA7 64Kbytes 32Kwords
SA8 64Kbytes 32Kwords
SA9 64Kbytes 32Kwords
SA10 64Kbytes 32Kwords
SA11 64Kbytes 32Kwords
SA12 64Kbytes 32Kwords
SA13 64Kbytes 32Kwords
SA14 64Kbytes 32Kwords
SA15 32Kbytes 16Kwords
SA16 8Kbytes 4Kwords
SA17 8Kbytes 4Kwords
SA18 16Kbytes 8Kwords
Address range
Byte Mode (x8) Word Mode (x16)
00000h-0FFFFh 00000h-07FFFh
10000h-1FFFFh 08000h-0FFFFh
20000h-2FFFFh 10000h-17FFFh
30000h-3FFFFh 18000h-1FFFFh
40000h-4FFFFh 20000h-27FFFh
50000h-5FFFFh 28000h-2FFFFh
60000h-6FFFFh 30000h-37FFFh
70000h-7FFFFh 38000h-3FFFFh
80000h-8FFFFh 40000h-47FFFh
90000h-9FFFFh 48000h-4FFFFh
A0000h-AFFFFh 50000h-57FFFh
B0000h-BFFFFh 58000h-5FFFFh
C0000h-CFFFFh 60000h-67FFFh
D0000h-DFFFFh
68000h-6FFFFhw w w . D a t a S h e e t . c o . k r
E0000h-EFFFFh 70000h-77FFFh
F0000h-F7FFFh 78000h-7BFFFh
F8000h-F9FFFh 7C000h-7CFFFh
FA000h-FBFFFh 7D000h-7DFFFh
FC000h-FFFFFh 7E000h-7FFFFh
Sector Address
A18 A17 A16 A15 A14 A13 A12
0 0 0 0XX X
0 0 0 1XX X
0 0 1 0XX X
0 0 1 1XX X
0 1 0 0XX X
0 1 0 1XX X
0 1 1 0XX X
0 1 1 1XX X
1 0 0 0XX X
1 0 0 1XX X
1 0 1 0XX X
1 0 1 1XX X
1 1 0 0XX X
1 1 0 1XX X
1 1 1 0XX X
11110X X
111110 0
111110 1
111111 X
Note: Byte mode:address range A18:A-1, word mode:address range A18:A0.
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KH29LV800C T/B
TABLE 2: KH29LV800CB SECTOR ARCHITECTURE
Sector
Sector Size
Byte Mode Word Mode
SA0 16Kbytes 8Kwords
SA1 8Kbytes 4Kwords
SA2 8Kbytes 4Kwords
SA3 32Kbytes 16Kwords
SA4 64Kbytes 32Kwords
SA5 64Kbytes 32Kwords
SA6 64Kbytes 32Kwords
SA7 64Kbytes 32Kwords
SA8 64Kbytes 32Kwords
SA9 64Kbytes 32Kwords
SA10 64Kbytes 32Kwords
SA11 64Kbytes 32Kwords
SA12 64Kbytes 32Kwords
SA13 64Kbytes 32Kwords
SA14 64Kbytes 32Kwords
SA15 64Kbytes 32Kwords
SA16 64Kbytes 32Kwords
SA17 64Kbytes 32Kwords
SA18 64Kbytes 32Kwords
Address range
Byte Mode (x8) Word Mode (x16)
00000h-03FFFh 00000h-01FFFh
04000h-05FFFh 02000h-02FFFh
06000h-07FFFh 03000h-03FFFh
08000h-0FFFFh 04000h-07FFFh
10000h-1FFFFh 08000h-0FFFFh
20000h-2FFFFh 10000h-17FFFh
30000h-3FFFFh 18000h-1FFFFh
40000h-4FFFFh 20000h-27FFFh
50000h-5FFFFh 28000h-2FFFFh
60000h-6FFFFh 30000h-37FFFh
70000h-7FFFFh 38000h-3FFFFh
80000h-8FFFFh 40000h-47FFFh
90000h-9FFFFh 48000h-4FFFFh
A0000h-AFFFFh 50000h-57FFFh
B0000h-BFFFFh
C0000h-CFFFFh
58000h-5FFFFh
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60000h-67FFFh
D0000h-DFFFFh 68000h-6FFFFh
E0000h-EFFFFh 70000h-77FFFh
F0000h-FFFFFh 78000h-7FFFFh
Sector Address
A18 A17 A16 A15 A14 A13 A12
000000 X
000001 0
000001 1
00001X X
0 0 0 1XX X
0 0 1 0XX X
0 0 1 1XX X
0 1 0 0XX X
0 1 0 1XX X
0 1 1 0XX X
0 1 1 1XX X
1 0 0 0XX X
1 0 0 1XX X
1 0 1 0XX X
1 0 1 1XX X
1 1 0 0XX X
1 1 0 1XX X
1 1 1 0XX X
1 1 1 1XX X
Note: Byte mode:address range A18:A-1, word mode:address range A18:A0.
P/N:PM1222
REV. 1.2, DEC. 09, 2005
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