KH25L3206E Datasheet PDF - macronix

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KH25L3206E
macronix

Part Number KH25L3206E
Description 32M-BIT [x 1 / x 2] CMOS SERIAL FLASH
Page 30 Pages


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KH25L3206E
KH25L3206E DATASHEET
P/N: PM1867
REV. 1.2, NOV. 28, 2013
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KH25L3206E
Contents
FEATURES................................................................................................................................................................... 5
GENERAL DESCRIPTION.......................................................................................................................................... 6
PIN CONFIGURATIONS .............................................................................................................................................. 7
PIN DESCRIPTION....................................................................................................................................................... 7
BLOCK DIAGRAM........................................................................................................................................................ 8
MEMORY ORGANIZATION.......................................................................................................................................... 9
Table 1. Memory Organization............................................................................................................................. 9
DEVICE OPERATION................................................................................................................................................. 10
Figure 1. Serial Modes Supported........................................................................................................ 10
DATA PROTECTION................................................................................................................................................... 11
Table 2. Protected Area Sizes............................................................................................................................. 12
Table 3. 512 bits Secured OTP Definition.......................................................................................................... 12
HOLD FEATURES...................................................................................................................................................... 13
Figure 2. Hold Condition Operation ......................................................................................................... 13
COMMAND DESCRIPTION........................................................................................................................................ 14
Table 4. COMMAND DEFINITION...................................................................................................................... 14
(1) Write Enable (WREN).................................................................................................................................... 15
(2) Write Disable (WRDI)..................................................................................................................................... 15
(3) Read Status Register (RDSR)....................................................................................................................... 15
(4) Write Status Register (WRSR)....................................................................................................................... 16
Table 5. Protection Modes................................................................................................................................... 17
(5) Read Data Bytes (READ).............................................................................................................................. 18
(6) Read Data Bytes at Higher Speed (FAST_READ)........................................................................................ 18
(7) Dual Output Mode (DREAD).......................................................................................................................... 18
(8) Sector Erase (SE).......................................................................................................................................... 18
(9) Block Erase (BE)............................................................................................................................................ 19
(10) Chip Erase (CE)........................................................................................................................................... 19
(11) Page Program (PP)...................................................................................................................................... 19
(12) Deep Power-down (DP)............................................................................................................................... 20
(13) Release from Deep Power-down (RDP), Read Electronic Signature (RES) .............................................. 20
(14) Read Identification (RDID)........................................................................................................................... 21
(15) Read Electronic Manufacturer ID & Device ID (REMS)............................................................................... 21
Table 6. ID DEFINITIONS .................................................................................................................................. 21
(16) Enter Secured OTP (ENSO)........................................................................................................................ 21
(17) Exit Secured OTP (EXSO)........................................................................................................................... 21
(18) Read Security Register (RDSCUR)............................................................................................................. 22
Table 7. SECURITY REGISTER DEFINITION.................................................................................................... 22
(19) Write Security Register (WRSCUR)............................................................................................................. 22
P/N: PM1867
REV. 1.2, NOV. 28, 2013
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KH25L3206E
(20) Read SFDP Mode (RDSFDP)...................................................................................................................... 23
Read Serial Flash Discoverable Parameter (RDSFDP) Sequence..................................................................... 23
Table a. Signature and Parameter Identification Data Values ............................................................................ 24
Table b. Parameter Table (0): JEDEC Flash Parameter Tables.......................................................................... 25
Table c. Parameter Table (1): Macronix Flash Parameter Tables........................................................................ 27
POWER-ON STATE.................................................................................................................................................... 29
ELECTRICAL SPECIFICATIONS............................................................................................................................... 30
ABSOLUTE MAXIMUM RATINGS...................................................................................................................... 30
Figure 3. Maximum Negative Overshoot Waveform........................................................................................... 30
CAPACITANCE TA = 25°C, f = 1.0 MHz.............................................................................................................. 30
Figure 4. Maximum Positive Overshoot Waveform............................................................................................. 30
Figure 5. INPUT TEST WAVEFORMS AND MEASUREMENT LEVEL............................................................... 31
Figure 6. OUTPUT LOADING............................................................................................................................ 31
Table 8. DC CHARACTERISTICS....................................................................................................................... 32
Table 9. AC CHARACTERISTICS....................................................................................................................... 33
Timing Analysis......................................................................................................................................................... 34
Figure 7. Serial Input Timing............................................................................................................................... 34
Figure 8. Output Timing....................................................................................................................................... 34
Figure 9. Hold Timing.......................................................................................................................................... 35
Figure 10. WP# Disable Setup and Hold Timing during WRSR when SRWD=1................................................ 35
Figure 11. Write Enable (WREN) Sequence (Command 06).............................................................................. 36
Figure 12. Write Disable (WRDI) Sequence (Command 04)............................................................................... 36
Figure 13. Read Status Register (RDSR) Sequence (Command 05)................................................................. 37
Figure 14. Write Status Register (WRSR) Sequence (Command 01)................................................................ 37
Figure 15. Read Data Bytes (READ) Sequence (Command 03)....................................................................... 37
Figure 16. Read at Higher Speed (FAST_READ) Sequence (Command 0B).................................................... 38
Figure 17. Dual Output Read Mode Sequence (Command 3B).......................................................................... 39
Figure 18. Sector Erase (SE) Sequence (Command 20)................................................................................... 39
Figure 19. Block Erase (BE) Sequence (Command 52 or D8)........................................................................... 39
Figure 20. Chip Erase (CE) Sequence (Command 60 or C7)............................................................................ 40
Figure 21. Page Program (PP) Sequence (Command 02)................................................................................. 40
Figure 22. Deep Power-down (DP) Sequence (Command B9).......................................................................... 41
Figure 23. Release from Deep Power-down (RDP) Sequence (Command AB)................................................ 41
Figure 24. Read Electronic Signature (RES) Sequence (Command AB)........................................................... 41
Figure 25. Read Identification (RDID) Sequence (Command 9F)....................................................................... 42
Figure 26. Read Electronic Manufacturer & Device ID (REMS) Sequence (Command 90)............................... 42
Figure 27. Read Security Register (RDSCUR) Sequence (Command 2B)......................................................... 43
Figure 28. Write Security Register (WRSCUR) Sequence (Command 2F)........................................................ 43
Figure 29. Program/ Erase flow with read array data.......................................................................................... 44
P/N: PM1867
REV. 1.2, NOV. 28, 2013
3



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KH25L3206E
Figure 30. Power-up Timing................................................................................................................................ 45
Table 10. Power-Up Timing ................................................................................................................................ 45
OPERATING CONDITIONS........................................................................................................................................ 46
Figure 31. AC Timing at Device Power-Up.......................................................................................................... 46
Figure 32. Power-Down Sequence..................................................................................................................... 47
ERASE AND PROGRAMMING PERFORMANCE..................................................................................................... 48
DATA RETENTION..................................................................................................................................................... 48
LATCH-UP CHARACTERISTICS............................................................................................................................... 48
ORDERING INFORMATION....................................................................................................................................... 49
PART NAME DESCRIPTION...................................................................................................................................... 50
PACKAGE INFORMATION......................................................................................................................................... 51
REVISION HISTORY .................................................................................................................................................. 54
P/N: PM1867
REV. 1.2, NOV. 28, 2013
4



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