JMH330/JMH330S Serial ATA Bridge Chip
The JMicron JMH330/JMH330S is a single chip solution for serial and parallel ATA translation. It
includes the Serial ATA PHY, Link, Transport, and parallel ATA (application layer) controller. The main
applications are for serial ATA storage devices connecting to traditional IDE south bridge. For traditional
IDE host, the bridge supports master only.
The Serial ATA physical, link, and transport layer are compliance to Serial ATA Generation 1, which
supports a 1.5Gbps data rate. The application layer supports both the ATA register command set and
PACKET command set, which could drive both the Hard Disk Drive and ATAPI Optical Storage such as
CR-ROM, CD-RW, DVD-ROM, DVD-RW, etc.
This chip is designed by 0.18um CMOS technology and 64-pin TQFP or QFN or LFQP package.
¾ 0.18um CMOS technology.
¾ Compliance with Gen1i/Gen1m of Serial ATA II Electricalwww.DataSheet.co.kr Specification 2.6.
¾ 1.8V and 3.3V power system.
¾ 25MHz external reference clock.
¾ 64-pin TQFP ,QFN and LFQP packages.
¾ Support ATA/ATAPI-7 specification.
¾ ATA/ATAPI PIO Mode 0, 1, 2, 3, 4.
¾ ATA/ATAPI Multi-Word DMA Mode 0, 1, 2.
¾ ATA/ATAPI Ultra DMA Mode 0, 1, 2, 3, 4, 5, 6, 7.
¾ ATA/ATAPI PACKET command feature set.
¾ ATA/ATAPI LBA48 addressing mode associated with 2-byte sector count.
¾ Serial ATA power saving modes.
Datasheet pdf - http://www.DataSheet4U.net/