JMF601 Datasheet PDF - JMicron


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JMF601
JMicron

Part Number JMF601
Description SATA II to Flash Controller
Page 3 Pages

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JMF601
JMF601
SATA II to Flash Controller
Overview
JMF601 is a single chip with Serial ATA Gen II and USB 2.0 combo to NAND flash interface.
It is an innovative design to provide high bandwidth for flash memory access.
JMF601 can support the maximum read and write speed to drive the limit of flash memory.
It supports up to 64 NAND Flash chips. JMF601 is available in 130 pin TFBGA (9mm x 9 mm)
package.
JMF601 supports a variety of popular NAND flash memory, including Toshiba, Samung,
Hynix/ST and Intel/Micron Flash. With the embedded hardware error correction engines and
the robust bad block management technology, JMF601 is suitable for PC and industrial solid
state drive applications. In addition, dynamic and whole drive static wear leveling are used in
JMF601 to provide the best extension of drive life time.
JMicron also provides reference designs in different drive form factors, mass production
tool and firmware update tool to help customers go on mass product quickly.
Feature
Compliance
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Compliant with Universal Serial Bus Specification Revision 2.0
Compliant with USB Mass Storage Class specification version 1.0
Compliant with Serial ATA International Organization : Serial ATA Revision 2.6
USB 2.0
USB Bulk mode transport protocol
SATA II
Supports 3.0Gbps SATA II interface
FLASH
Supports up 64 CEs.
110/90 MB/s Sequential read/write rates
Enhanced endurance by Dynamic/Static wear-leveling
Supports BCH ECC to correct 8/15 bit errors in 512 bytes
Support both 2K and 4K byte page size flash
Supports dynamic power management
Support SMART function
Data integrity under power-cycling
Supports USB/SATA firmware upgrade
Copyright © 2006 JMicron Technology Corp. All rights reserved.
Product Brief Reversion 0.1
Page 1
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2008/06/01
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SYSTEM
Integrated 1-port USB2.0, 1-port SATA II and 4-channel Flash controller
LED indicator for USB2.0 and SATA read/write access
LED indicator for USB2.0 and SATA PHY link up
Provides 12 GPIO pins for customer
Provides UART and JTAG for S/W debugging
Available in 130-pin TFBGA (9 mm * 9 mm) package
Built-in power-up self-test (BIST)
Manual and automatic self-diagnostics
JMF601
Functional Block Diagram
JMF601
Flash Controller 1
&
ECC engine
SATA
Controller
SATA II
PHY
Bus
www.DataSheet.co.kr
Flash Controller 4
&
ECC engine
USB 2.0
Controller
GPIO
GPIO
Chip
Configuration
CPU
Chip Config.
Functional Block Diagram of JMF601
USB 2.0
PHY
Copyright © 2006 JMicron Technology Corp. All rights reserved.
Product Brief Reversion 0.1
Page 2
NDA Required
2008/06/01
Datasheet pdf - http://www.DataSheet4U.net/



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JMF601
Total capacity
density/per flash
128M x 8 Bits (1Gb)
256M x 8 Bits (2Gb)
512M x 8 Bits (4Gb)
1G x 8 Bits (8Gb)
1G x 8 Bits (8Gb)
2G x 8 Bits (16Gb)
4G x 8 Bits (32Gb)
Support CE
pins/per flash
1 CE pin
1 CE pin
1 CE pin
2 CE pins
1 CE pin
2 CE pins
4 CE pins
maximum flash
number
64
64
64
32
64
32
16
Total capacity
8G Bytes
16G Bytes
32G Bytes
32G Bytes
64G Bytes
64G Bytes
64G Bytes
Product Information
Name
JMF601
Description
SATA II to Flash Controller
Document
1 JMF601 Data Sheet
2 JMF601 Design Specification
3 JMF601 Hardware Design Guide
4 JMF601 Hardware Schematic
Contact Information
Department
Email
www.DataSheet.co.kr
Sales
Tech. Support
sales@jmicron.com
fae@jmicron.com
Copyright © 2006 JMicron Technology Corp. All rights reserved.
Product Brief Reversion 0.1
Page 3
NDA Required
2008/06/01
Datasheet pdf - http://www.DataSheet4U.net/




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