JMD330 Datasheet PDF - JMicron


Part Number JMD330
Description Serial ATA Bridge Chip
Page 2 Pages

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JMD330 Serial ATA Bridge Chip
The JMicron JMD330 Bridge is a single chip solution for serial and parallel ATA translation. It
includes the Serial ATA PHY, Link, Transport, and parallel ATA (application layer) controller. The main
applications are for legacy IDE storage devices connecting to newer chipset supporting serial ATA, such as
the iCH5 south bridge of Intel chipset.
The Serial ATA physical, link, and transport layer are compliance to Serial ATA Generation 1, which
supports a 1.5Gbps data rate. The application layer supports both the ATA register command set and
PACKET command set, which could drive both the Hard Disk Drive and ATAPI Optical Storage such as
This chip is designed by 0.18um CMOS technology and 64-pin TQFP or QFN package.
¾ 0.18um CMOS technology.
¾ Compliance with Gen1i/Gen1m of Serial ATA II Specification 2.6.
¾ 1.8V and 3.3V power system.
¾ 25MHz external reference clock.
¾ 64-pin TQFP and QFN packages.
¾ Support ATA/ATAPI-7 specification.
¾ ATA/ATAPI PIO Mode 0, 1, 2, 3, 4.
¾ ATA/ATAPI Multi-Word DMA Mode 0, 1, 2.
¾ ATA/ATAPI Ultra DMA Mode 0, 1, 2, 3, 4, 5, 6, 7.
¾ ATA/ATAPI PACKET command feature set.
¾ ATA/ATAPI LBA48 addressing mode associated with 2-byte sector count.
¾ Serial ATA power saving modes.
¾ Serial ATA hot-plug.
¾ SATA II Asynchronous Signal Recovery support.
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Functional Block Diagram
Product Information
Serial ATA Bridge Chip
Design Kit
1 JMD330 Data Sheet
2 JMD330 Design Guide
3 Application EVB
Contact Information
Tech. Support
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