IPB120N03S4L-03 Datasheet PDF - Infineon

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IPB120N03S4L-03
Infineon

Part Number IPB120N03S4L-03
Description Power-Transistor
Page 9 Pages


IPB120N03S4L-03 datasheet pdf
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OptiMOS-T2 Power-Transistor
Features
• N-channel - Enhancement mode
• Automotive AEC Q101 qualified
• MSL1 up to 260°C peak reflow
• 175°C operating temperature
Green package (lead free)
• 100% Avalanche tested
IPB120N03S4L-03
Product Summary
V DS
R DS(on),max
ID
30 V
3 mW
120 A
PG-TO263-3-2
Type
IPB120N03S4L-03
Package
PG-TO263-3-2
Ordering Code Marking
- 4N03L03
Maximum ratings, at T j=25 °C, unless otherwise specified
Parameter
Symbol
Conditions
Continuous drain current1)
I D T C=25°C, V GS=10V
T C=100°C, V GS=10V2)
Pulsed drain current2)
I D,pulse T C=25°C
Avalanche energy, single pulse
E AS I D=60A
Avalanche current, single pulse
I AS -
Gate source voltage
V GS
Power dissipation
P tot T C=25°C
Operating and storage temperature T j, T stg
IEC climatic category; DIN IEC 68-1
Value
120
88
480
75
120
±16
79
-55 ... +175
55/175/56
Unit
A
mJ
A
V
W
°C
Rev. 1.1
page 1
2014-04-28



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IPB120N03S4L-03
Parameter
Symbol
Conditions
Thermal characteristics2)
Thermal resistance, junction - case
R thJC
Thermal resistance, junction -
ambient, leaded
R thJA
SMD version, device on PCB
R thJA
minimal footprint
6 cm2 cooling area3)
min.
Values
typ.
Unit
max.
- - 1.9 K/W
- - 62
- - 62
- - 40
Electrical characteristics, at T j=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage
V (BR)DSS V GS=0V, I D= 1mA
Gate threshold voltage
V GS(th) V DS=V GS, I D=40µA
30 -
-V
1.0 1.6 2.2
Zero gate voltage drain current
Gate-source leakage current
Drain-source on-state resistance
Drain-source on-state resistance
I DSS
V DS=30V, V GS=0V,
T j=25°C
V DS=30V, V GS=0V,
T j=125 °C2)
I GSS
V GS=16V, V DS=0V
R DS(on) V GS=4.5V, I D=60A
RDS(on) V GS=10V, I D=100A
- - 1 µA
- - 100
- - 100 nA
- 3.7 5.1 mW
- 2.6 3 mΩ
Rev. 1.1
page 2
2014-04-28



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IPB120N03S4L-03
Parameter
Symbol
Conditions
min.
Values
typ.
Unit
max.
Dynamic characteristics2)
D-85579 Neubiberg
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
Turn-off delay time
Fall time
C iss
C oss
Crss
V GS=0V, V DS=25V,
f =1MHz
- 4100 5300 pF
- 900 1200
- 45 90
t d(on)
- 7 - ns
tr
V DD=15V, V GS=10V,
-
24
-
t d(off)
I D=120A, R G=3.5W
-
21
-
t f - 34 -
Gate Charge Characteristics2)
Gate to source charge
Gate to drain charge
Gate charge total
Q gs
Q gd V DD=24V, I D=120A,
Q g V GS=0 to 10V
-
-
-
13 17 nC
8 16
55 72
Gate plateau voltage
V plateau
- 3.3 - V
Reverse Diode
Diode continous forward current2)
Diode pulse current2)
Diode forward voltage
Reverse recovery time2)
IS
I S,pulse
V SD
T C=25°C
V GS=0V, I F=100A,
T j=25°C
t rr
V R=15V, I F=I S,
di F/dt =100A/µs
- - 120 A
- - 480
- 0.9 1.3 V
- 85 - ns
Reverse recovery charge2)
Q rr
- 150 - nC
1) Current is limited by bondwire; with an R thJC = 1.9K/W the chip is able to carry 124A at 25°C.
2) Defined by design. Not subject to production test.
3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
Rev. 1.1
page 3
2014-04-28



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IPB120N03S4L-03
1 Power dissipation
P tot = f(T C); V GS ≥ 6 V
2 Drain current
I D = f(T C); V GS ≥ 6 V
90
80
70
60
50
40
30
20
10
0
0 50 100
T C [°C]
3 Safe operating area
I D = f(V DS); T C = 25 °C; D = 0
parameter: t p
1000
150
140
120
100
80
60
40
20
0
200 0 50 100 150
T C [°C]
4 Max. transient thermal impedance
Z thJC = f(t p)
parameter: D =t p/T
101
limited by on-state
resistance
100
1 µs
10 µs
100 µs
1 ms
100 0.5
200
10
1
0.1
Rev. 1.1
1 10
V DS [V]
100
10-1
0.1
0.05
0.01
single pulse
10-2
page 4
t p [s]
2014-04-28



IPB120N03S4L-03 datasheet pdf
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Infineon
IPB120N03S4L-03 pdf

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