IDT70V9389L Datasheet PDF - IDT


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IDT70V9389L
IDT

Part Number IDT70V9389L
Description HIGH-SPEED 3.3V 64K x18/x16 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM
Page 19 Pages

IDT70V9389L datasheet pdf
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HIGH-SPEED 3.3V
64K x18/x16
SYNCHRONOUS PIPELINED IDT70V9389/289L
Š DUAL-PORT STATIC RAM
Features:
True Dual-Ported memory cells which allow simultaneous
access of the same memory location
High-speed clock to data access
– Commercial: 7.5/9/12ns (max.)
– Industrial: 9ns (max.)
Low-power operation
– IDT70V9389/289L
Active: 500mW (typ.)
Standby: 1.5mW (typ.)
Flow-Through or Pipelined output mode on either port via
the FT/PIPE pins
Counter enable and reset features
Dual chip enables allow for depth expansion without
additional logic
LVTTL- compatible, single 3.3V (±0.3V) power supply
Functional Block Diagram
Full synchronous operation on both ports
– 4ns setup to clock and 0ns hold on all control, data, and
address inputs
– Data input, address, and control registers
– Fast 7.5ns clock to data out in the Pipelined output mode
– Self-timed write allows fast cycle time
– 12ns cycle time, 83MHz operation in Pipelined output
mode
Separate upper-byte and lower-byte controls for
multiplexed bus and bus matching compatibility
Industrial temperature range (–40°C to +85°C) is
available for selected speeds
Available in a 128-pin Thin Quad Flatpack (TQFP) and
100-pin Thin Quad Flatpack (TQFP)
Green parts available, see ordering information
R/WL
UBL
CE0L
CE1L
LBL
OEL
1
0
0/1
R/WR
UBR
CE0R
1
0
CE1R
0/1
LBR
OER
FT/PIPEL
I/O9L-I/O17L(2)
I/O0L-I/O8L(1)
A15L
A0L
CLKL
ADSL
CNTENL
CNTRSTL
0/1 1b 0b b a 1a 0a
Counter/
Address
Reg.
I/O
Control
I/O
Control
MEMORY
ARRAY
0a 1a
a
b0b 1b
0/1
Counter/
Address
Reg.
FT/PIPER
I/O9R-I/O17R(1)
I/O0R-I/O8R(1)
A15R
A0R
CLKR
ADSR
CNTENR
CNTRSTR
4856 drw 01
NOTES:
1. I/O0X - I/O7X for IDT70V9289.
2. I/O8X - I/O15X for IDT70V9289.
©2014 Integrated Device Technology, Inc.
1
MARCH 2014
DSC-4856/8



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IDT70V9389/289L
High-Speed 3.3V 64K x18/x16 Dual-Port Synchronous Pipelined Static RAM
Industrial & Commercial Temperature Ranges
Description:
The IDT70V9389/289 is a high-speed 64K x 18 (64K x 16) bit
synchronous Dual-Port RAM. The memory array utilizes Dual-Port
memory cells to allow simultaneous access of any address from both ports.
Registers on control, data, and address inputs provide minimal setup and
hold times. The timing latitude provided by this approach allows systems
to be designed with very short cycle times.
Pin Configuration(1,2,3)
With an input data register, the IDT70V9389/289 has been
optimized for applications having unidirectional or bidirectional data
flow in bursts. An automatic power down feature, controlled by CE0
and CE1, permits the on-chip circuitry of each port to enter a very low
standby power mode. Fabricated using CMOS high-performance
technology, these devices typically operate on only 500mW of
power.
02/25/14
NC
NC
NC
NC
A9R
A8R
A7R
A6R
A5R
A4R
A3R
A2R
A1R
A0R
NC
CNTENR
CLKR
ADSR
VSS
VDD
ADSL
CLKL
CNTENL
NC
A0L
A1L
A2L
A3L
A4L
A5L
A6L
A7L
A8L
A9L
NC
NC
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
70V9389PRF
PK128(4)
128-Pin TQFP
Top View(5)
NOTES:
1. All VDD pins must be connected to power supply.
2. All VSS pins must be connected to ground.
3. Package body is approximately 14mm x 20mm x 1.4mm.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.
6.422
102 I/O12R
101 I/O11R
100 VSS
99 NC
98 I/O10R
97 I/O9R
96 I/O8R
95 I/O7R
94 VDD
93 I/O6R
92 I/O5R
91 I/O4R
90 VSS
89 I/O3R
88 VDD
87 I/O2R
86 I/O1R
85 I/O0R
84 VSS
83 VDD
82 I/O0L
81 I/O1L
80 VSS
79 I/O2L
78 I/O3L
77 VSS
76 I/O4L
75 I/O5L
74 I/O6L
73 I/O7L
72 VDD
71 I/O8L
70 I/O9L
69 I/O10L
68 NC
67 VDD
66 I/O11L
65 I/O12L
4856 drw 02



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IDT70V9389/289L
High-Speed 3.3V 64K x18/x16 Dual-Port Synchronous Pipelined Static RAM
Pin Configurations(1,2,3)(con't.)
Industrial & Commercial Temperature Ranges
02/25/14
INDEX
A9L
A10L
A11L
A12L
A13L
A14L
A15L
LBL
UBL
CE0L
CE1L
CNTRSTL
R/WL
OEL
VDD
FT/PIPEL
I/O17L
I/O16L
VSS
I/O15L
I/O14L
I/O13L
I/O12L
I/O11L
I/O10L
1100 99 98
97 96 95
94
93 92
91 90
89 88
87 86
85 84
83 82
81
80 79
78 77
76
75
2 74
3 73
4 72
5 71
6 70
7 69
8 68
9 67
10 66
11
70V9389PF
65
12
PN100(4)
64
13 63
14
100-Pin TQFP
62
15
Top View(5)
61
16 60
17 59
18 58
19 57
20 56
21 55
22 54
23 53
24 52
25 51
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
A8R
A9R
A10R
A11R
A12R
A13R
A14R
A15R
LBR
UBR
CE0R
CE1R
CNTRSTR
R/WR
VSS
OER
FT/PIPER
I/O17R
VSS
I/O16R
I/O15R
I/O14R
I/O13R
I/O12R
I/O11R
,
4856 drw 02a
NOTES:
1. All VDD pins must be connected to power supply.
2. All VSS pins must be connected to ground.
3. Package body is approximately 14mm x 14mm x 1.4mm
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.
6.432



No Preview Available !

IDT70V9389/289L
High-Speed 3.3V 64K x18/x16 Dual-Port Synchronous Pipelined Static RAM
Pin Configurations(1,2,3)(con't.)
Industrial & Commercial Temperature Ranges
02/25/14
NC
NC
NC
NC
A9R
A8R
A7R
A6R
A5R
A4R
A3R
A2R
A1R
A0R
NC
CNTENR
CLKR
ADSR
VSS
VDD
ADSL
CLKL
CNTENL
NC
A0L
A1L
A2L
A3L
A4L
A5L
A6L
A7L
A8L
A9L
NC
NC
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
70V9289PRF
PK128(4)
128-Pin TQFP
Top View(5)
102 I/O10R
101 I/O9R
100 VSS
99 NC
98 I/O8R
97 NC
96 NC
95 I/O7R
94 VDD
93 I/O6R
92 I/O5R
91 I/O4R
90 VSS
89 I/O3R
88 VDD
87 I/O2R
86 I/O1R
85 I/O0R
84 VSS
83 VDD
82 I/O0L
81 I/O1L
80 VSS
79 I/O2L
78 I/O3L
77 VSS
76 I/O4L
75 I/O5L
74 I/O6L
73 I/O7L
72 VDD
71 NC
70 NC
69 I/O8L
68 NC
67 VDD
66 I/O9L
65 I/O10L
4856 drw 02b
NOTES:
1. All VDD pins must be connected to power supply.
2. All VSS pins must be connected to ground.
3. Package body is approximately 14mm x 20mm x 1.4mm.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.
6.442




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