High-Speed 32K x 18 Dual-Port Synchronous Pipelined Static RAM
Industrial and Commercial Temperature Ranges
Truth Table IIAddress Counter Control(1,2,6)
Address Address Used CLK ADS CNTEN CNTRST
X X 0 ↑ X X L DI/O(0) Counte r Reset to Address 0
An X An ↑ L(4) X H DI/O(n) External Address Loaded into Counter
An Ap Ap ↑ H H
H DI/O(p) External Address Blocked—Counter disabled (Ap reused)
Ap Ap + 1 ↑
H DI/O(p+1) Counter Enabled—Internal Address generation
1. "H" = VIH, "L" = VIL, "X" = Don't Care.
2. CE0, LB, UB, and OE = VIL; CE1 and R/W = VIH.
3. Outputs configured in Flow-Through Output mode; if outputs are in Pipelined mode the data out will be delayed by one cycle.
4. ADS is independent of all other signals including CE0, CE1, UB and LB.
5. The address counter advances if CNTEN = VIL on the rising edge of CLK, regardless of all other signals including CE0, CE1, UB and LB.
6. While an external address is being loaded (ADS = VIL), R/W = VIH is recommended to ensure data is not written arbitrarily.
4857 tbl 03
Recommended DC Operating
Temperature and Supply Voltage(1) Conditions
0OC to +70OC 0V 3.3V + 0.3V
-40OC to +85OC
3.3V + 0.3V
4857 tbl 04
1. Industrial temperature: for specific speeds, packages and powers contact your
2. This is the parameter TA. This is the "instant on" case temperature.
VCC Supply Voltage
VIH Input High Voltage
VIL Input Low Voltage
1. VIL > -1.5V for pulse width less than 10 ns.
2. VTERM must not exceed VCC +0.3V.
4857 tbl 05
Absolute Maximum Ratings(1)
with Respect to
-0.5 to +4.6
-55 to +125
-55 to +150
IOUT DC Output Current
4857 tbl 06
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated
in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
2. VTERM must not exceed VCC +0.3V for more than 25% of the cycle time or 10ns
maximum, and is limited to < 20mA for the period of VTERM > VCC + 0.3V.
(TA = +25°C, f = 1.0MHZ)
Conditions(2) Max. Unit
CIN Input Capacitance
VIN = 3dV
COUT(3) Output Capacitance
VOUT = 3dV
4857 tbl 07
1. These parameters are determined by device characterization, but are not
2. 3dV references the interpolated capacitance when the input and output switch
from 0V to 3V or from 3V to 0V.
3. COUT also references CI/O.