FDD4685 Datasheet PDF - Fairchild Semiconductor

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FDD4685
Fairchild Semiconductor

Part Number FDD4685
Description P-Channel PowerTrench MOSFET
Page 6 Pages


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FDD4685
40V P-Channel PowerTrench® MOSFET
40V, 32A, 27m
Features
General Description
October 2006
tm
„ Max rDS(on) = 27mat VGS = –10V, ID = –8.4A
„ Max rDS(on) = 35mat VGS = –4.5V, ID = –7A
„ High performance trench technology for extremely low rDS(on)
„ RoHS Compliant
This P-Channel MOSFET has been produced using Fairchild
Semiconductor’s proprietary PowerTrench® technology to
deliver low rDS(on) and good switching characteristic offering
superior performance in application.
Application
„ Inverter
„ Power Supplies
G
S
D
DT O- P-2A5K2
(T O -25 2)
S
G
D
MOSFET Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDS
VGS
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous(Package Limited)
ID
-Continuous(Silicon Limited)
-Continuous
-Pulsed
EAS Drain-Source Avalanche Energy
PD
Power Dissipation
Power Dissipation
TJ, TSTG
Operating and Storage Junction Temperature Range
Thermal Characteristics
TC= 25°C
TC= 25°C
TA= 25°C
TC= 25°C
(Note 1)
(Note 1a)
(Note 3)
(Note 1a)
Ratings
–40
±20
–32
–40
–8.4
–100
121
69
3
–55 to +150
Units
V
V
A
mJ
W
°C
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Note 1a)
1.8
40
°C/W
Device Marking
FDD4685
Device
FDD4685
Package
D-PAK(TO-252)
Reel Size
13’’
Tape Width
12mm
Quantity
2500 units
©2006 Fairchild Semiconductor Corporation
FDD4685 Rev.B
1
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Electrical Characteristics TJ = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
BVDSS
TJ
IDSS
IGSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
ID = –250µA, VGS = 0V
ID = –250µA, referenced to 25°C
VDS = –32V, VGS = 0V
VGS = ±20V, VGS = 0V
–40
V
–33 mV/°C
–1
±100
µA
nA
On Characteristics (Note 2)
VGS(th)
VGS(th)
TJ
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
rDS(on)
Static Drain to Source On Resistance
gFS Forward Transconductance
VGS = VDS, ID = –250µA
ID = –250µA, referenced to 25°C
VGS = –10V, ID = –8.4A
VGS = –4.5V, ID = –7A
VGS = –10V, ID = –8.4A, TJ=125°C
VDS = –5V, ID = –8.4A
–1
–1.6
4.9
23
30
33
23
–3 V
mV/°C
27
35 m
42
S
Dynamic Characteristics
Ciss
Coss
Crss
Rg
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
VDS = –20V, VGS = 0V,
f = 1MHz
f = 1MHz
1790
260
140
4
2380
345
205
pF
pF
pF
Switching Characteristics
td(on)
tr
td(off)
tf
Qg(TOT)
Qgs
Qgd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
VDD = –20V, ID = –8.4A
VGS = –10V, RGEN = 6
VDD =–20V, ID = –8.4A
VGS = –5V
8 16 ns
15 27 ns
34 55 ns
14 26 ns
19 27 nC
5.6 nC
6.1 nC
Drain-Source Diode Characteristics
VSD Source to Drain Diode Forward Voltage
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
VGS = 0V, IS = –8.4A (Note 2)
IF = –8.4A, di/dt = 100A/µs
–0.85
30
31
–1.2
45
47
V
ns
nC
Notes:
1: RθJA is the sum of the junction-to-case and case-to- ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
RθJC is guaranteed by design while RθJA is determined by the user’s board design.
a. 40°C/W when mounted on a 1 in2 pad of 2 oz copper
b. 96°C/W when mounted on a minimum pad.
2: Pulse Test: Pulse Width < 300µs, Duty cycle < 2.0%.
3: Starting TJ = 25°C, L = 3mH, IAS = 9A, VDD = 40V, VGS = 10V.
FDD4685 Rev.B
2 www.fairchildsemi.com



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Typical Characteristics TJ = 25°C unless otherwise noted
100
PULSE DURATION = 80µs
DUTY CYCLE = 0.5%MAX
80 VGS = -10V
60
40
VGS = -6V
VGS = -4.5V
VGS = -4V
20
VGS = -3V
0
01234
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On Region Characteristics
3.0
2.6 VGS = -3V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5%MAX
2.2 VGS = -4V
VGS = -4.5V
1.8
VGS = -6V
1.4
1.0 VGS = -10V
0.6
0
20 40 60
-ID, DRAIN CURRENT(A)
80
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
100
1.8
ID =-8.4A
1.6 VGS = -10V
1.4
1.2
1.0
0.8
0.6
-50
-25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
Figure 3. Normalized On Resistance
vs Junction Temperature
70
ID = -8.4A PULSE DURATION = 80µs
DUTY CYCLE = 0.5%MAX
60
50 TJ = 125oC
40
30
TJ = 25oC
20
23456789
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 4. On-Resistance vs Gate to
Source Voltage
10
100
PULSE DURATION = 80µs
DUTY CYCLE = 0.5%MAX
80
60
40 TJ = 25oC
20 TJ = 150oC
0 TJ = -55oC
12345
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics
6
40
VGS = 0V
10
TJ = 150oC
TJ = 25oC
1
TJ = -55oC
0.1
0.4 0.6 0.8 1.0 1.2
-VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
FDD4685 Rev.B
3 www.fairchildsemi.com



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Typical Characteristics TJ = 25°C unless otherwise noted
10
VDD = -10V
8
VDD = -20V
6
VDD = -30V
4
2
0
0 10 20 30
Qg, GATE CHARGE(nC)
Figure 7. Gate Charge Characteristics
40
109
8
7
6
5
4 TJ = 25oC
3
TJ = 125oC
2
1
0.01
0.1 1 10
tAV, TIME IN AVALANCHE(ms)
Figure9. UnclampedInductive
Switching Capability
100
104
Ciss
103
Coss
102 Crss
f = 1MHz
VGS = 0V
101
0.1 1 10
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 8. Capacitance vs Drain
to Source Voltage
50
50
40
VGS = -10V
30
20
Limited by Package
10
VGS = -4.5V
RθJC = 1.8oC/W
0
25 50
75
100 125
TC, CASE TEMPERATURE (oC)
Figure 10. Maximum Continuous Drain
Current vs Case Temperature
150
200
100
100us
10
1ms
1 10ms
OPERATION IN THIS
AREA MAY BE
LIMITED BY rDS(on)
0.1
1
SINGLE PULSE
TJ = MAX RATED
TC = 25OC
10
DC
100
-VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
300
250 FOR TEMPERATURES
200
VGS = -10V
ABOVE 25oC DERATE PEAK
CURRENT AS FOLLOWS:
150
I = I25
-1---5---10---2----5--T----c--
Tc = 25oC
100
SINGLE PULSE
50
10-3 10-2 10-1 100
t, PULSE WIDTH (s)
Figure 12. Single Pulse Maximum
Power Dissipation
101
FDD4685 Rev.B
4 www.fairchildsemi.com



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