EBD52UD6ADSA-E Datasheet PDF - Elpida Memory

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EBD52UD6ADSA-E
Elpida Memory

Part Number EBD52UD6ADSA-E
Description 512MB DDR SDRAM SO-DIMM
Page 19 Pages


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DATA SHEET
512MB DDR SDRAM SO-DIMM
EBD52UD6ADSA-E (64M words × 64 bits, 2 Ranks)
Description
The EBD52UD6ADSA is 64M words × 64 bits, 2 ranks
Double Data Rate (DDR) SDRAM Small Outline Dual
In-line Memory Module, mounting 8 pieces of 512M
bits DDR SDRAM sealed in TSOP package. Read and
write operations are performed at the cross points of
the CK and the /CK. This high-speed data transfer is
realized by the 2 bits prefetch-pipelined architecture.
Data strobe (DQS) both for read and write are available
for high speed and reliable data bus design. By setting
extended mode register, the on-chip Delay Locked
Loop (DLL) can be set enable or disable. This module
provides high density mounting without utilizing surface
mount technology. Decoupling capacitors are mounted
beside each TSOP on the module board.
Features
200-pin socket type small outline dual in line memory
module (SO-DIMM)
PCB height: 31.75mm
Lead pitch: 0.6mm
Lead-free
2.5V power supply
Data rate: 333Mbps/266Mbps (max.)
2.5 V (SSTL_2 compatible) I/O
Double Data Rate architecture; two data transfers per
clock cycle
Bi-directional, data strobe (DQS) is transmitted
/received with data, to be used in capturing data at
the receiver
Data inputs, outputs and DM are synchronized with
DQS
4 internal banks for concurrent operation
(Components)
DQS is edge aligned with data for READs; center
aligned with data for WRITEs
Differential clock inputs (CK and /CK)
DLL aligns DQ and DQS transitions with CK
transitions
Commands entered on each positive CK edge; data
referenced to both edges of DQS
Data mask (DM) for write data
Auto precharge option for each burst access
Programmable burst length: 2, 4, 8
Programmable /CAS latency (CL): 2, 2.5
Refresh cycles: (8192 refresh cycles /64ms)
7.8µs maximum average periodic refresh interval
2 variations of refresh
Auto refresh
Self refresh
Document No. E0604E10 (Ver. 1.0)
Date Published October 2004 (K) Japan
URL: http://www.elpida.com
Elpida Memory , Inc. 2004



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EBD52UD6ADSA-E
Ordering Information
Part number
EBD52UD6ADSA-6B-E
EBD52UD6ADSA-7A-E
EBD52UD6ADSA-7B-E
Data rate
Mbps (max.)
333
266
266
Component
JEDEC speed bin
(CL-tRCD-tRP)
DDR333B (2.5-3-3)
DDR266A (2-3-3)
DDR266B (2.5-3-3)
Package
Contact
pad
200-pin SO-DIMM Gold
(lead-free)
Mounted devices
EDD5116ADTA-6B-E
EDD5116ADTA-6B/7A-E
EDD5116ADTA-6B/7A/7B-E
Pin Configurations
1 pin
Front side
39 pin 41 pin
199 pin
Pin No.
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
101
103
105
Pin name
VREF
VSS
DQ0
DQ1
VDD
DQS0
DQ2
VSS
DQ3
DQ8
VDD
DQ9
DQS1
VSS
DQ10
DQ11
VDD
CK0
/CK0
VSS
DQ16
DQ17
VDD
DQS2
DQ18
A9
VSS
A7
2 pin
Pin No.
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
151
153
155
40 pin 42 pin
Back side
Pin name
Pin No.
VSS
2
DQ19
4
DQ24
6
VDD
8
DQ25
10
DQS3
12
VSS
14
DQ26
16
DQ27
18
VDD
20
NC 22
NC 24
VSS
26
NC 28
NC 30
VDD
32
NC 34
NC 36
VSS
38
CK2 40
/CK2
42
VDD
44
CKE1
46
NC 48
A12 50
DQ42
102
DQ43
104
VDD
106
200 pin
Pin name
VREF
VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7
DQ12
VDD
DQ13
DM1
VSS
DQ14
DQ15
VDD
VDD
VSS
VSS
DQ20
DQ21
VDD
DM2
DQ22
A8
VSS
A6
Pin No.
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
152
154
156
Pin name
VSS
DQ23
DQ28
VDD
DQ29
DM3
VSS
DQ30
DQ31
VDD
NC
NC
VSS
NC
NC
VDD
NC
NC
VSS
VSS
VDD
VDD
CKE0
NC
A11
DQ46
DQ47
VDD
Data Sheet E0604E10 (Ver. 1.0)
2



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Pin No.
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
Pin name
A5
A3
A1
VDD
A10/AP
BA0
/WE
/CS0
NC
VSS
DQ32
DQ33
VDD
DQS4
DQ34
VSS
DQ35
DQ40
VDD
DQ41
DQS5
VSS
Pin No.
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
Pin name
VDD
VSS
VSS
DQ48
DQ49
VDD
DQS6
DQ50
VSS
DQ51
DQ56
VDD
DQ57
DQS7
VSS
DQ58
DQ59
VDD
SDA
SCL
VDDSPD
VDDID
Pin No.
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
EBD52UD6ADSA-E
Pin name
A4
A2
A0
VDD
BA1
/RAS
/CAS
/CS1
NC
VSS
DQ36
DQ37
VDD
DM4
DQ38
VSS
DQ39
DQ44
VDD
DQ45
DM5
VSS
Pin No.
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
Pin name
/CK1
CK1
VSS
DQ52
DQ53
VDD
DM6
DQ54
VSS
DQ55
DQ60
VDD
DQ61
DM7
VSS
DQ62
DQ63
VDD
SA0
SA1
SA2
NC
Data Sheet E0604E10 (Ver. 1.0)
3



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Pin Description
Pin name
A0 to A12
BA0, BA1
DQ0 to DQ63
/RAS
/CAS
/WE
/CS0, /CS1
CKE0, CKE1
CK0 to CK2
/CK0 to /CK2
DQS0 to DQS7
DM0 to DM7
SCL
SDA
SA0 to SA2
VDD
VDDSPD
VREF
VSS
VDDID
NC
EBD52UD6ADSA-E
Function
Address input
Row address
A0 to A12
Column address A0 to A9
Bank select address
Data input/output
Row address strobe command
Column address strobe command
Write enable
Chip select
Clock enable
Clock input
Differential clock input
Input and output data strobe
Input mask
Clock input for serial PD
Data input/output for serial PD
Serial address input
Power for internal circuit
Power for serial EEPROM
Input reference voltage
Ground
VDD identification flag
No connection
Data Sheet E0604E10 (Ver. 1.0)
4



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Elpida Memory
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