DAC8801 Datasheet PDF - Burr-Brown

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DAC8801
Burr-Brown

Part Number DAC8801
Description Serial Input Multiplying Digital-to-Analog Converter
Page 16 Pages


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BurrĆBrown Products
from Texas Instruments
DAC8801
SLAS403A – NOVEMBER 2004 – REVISED DECEMBER 2004
14-Bit, Serial Input Multiplying Digital-to-Analog Converter
FEATURES
14-Bit Monotonic
• ±1 LSB INL
• ±0.5 LSB DNL
Low Noise: 12 nV/Hz
Low Power: IDD = 2 µA
+2.7 V to +5.5 V Analog Power Supply
2 mA Full-Scale Current ±20%
with VREF = 10 V
0.5 µs Settling Time
4-Quadrant Multiplying Reference-Input
Reference Bandwidth: 10 MHz
• ±10 V Reference Input
Reference Dynamics: -105 THD
3-Wire 50-MHz Serial Interface
Tiny 8-Lead 3 x 3 mm SON and 3 x 5 mm
MSOP Packages
Industry-Standard Pin Configuration
APPLICATIONS
Automatic Test Equipment
Instrumentation
Digitally Controlled Calibration
Industrial Control PLCs
DESCRIPTION
The DAC8801 multiplying digital-to-analog converter
is designed to operate from a single 2.7-V to 5.5-V
supply.
The applied external reference input voltage VREF
determines the full-scale output current. An internal
feedback resistor (RFB) provides temperature tracking
for the full-scale output when combined with an
external I-to-V precision amplifier.
A serial-data interface offers high-speed, three-wire
microcontroller compatible inputs using data-in (SDI),
clock (CLK), and chip select (CS).
The DAC8801 is packaged in space-saving 8-lead
SON and MSOP packages.
VDD
VREF
CS
CLK
SDI
DAC8801
D/A
Converter
14
DAC
Register
14
Shift
Register
RFB
IOUT
GND
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004, Texas Instruments Incorporated



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DAC8801
SLAS403A – NOVEMBER 2004 – REVISED DECEMBER 2004
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated
circuits be handled with appropriate precautions. Failure to observe proper handling and installation
procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision
integrated circuits may be more susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
PACKAGE/ORDERING INFORMATION (1)
PRODUCT
MINIMUM
RELATIVE
ACCURACY
(LSB)
DIFFERENTIAL
NONLINEARITY
(LSB)
PACKAGE-
LEAD
DAC8801
±1
±0.5
MSOP-8
PACKAGE
DESIGNATOR
DGK
DAC8801
±1
±0.5
MSOP-8
DGK
DAC8801
±1
±0.5
SON-8
DRB
DAC8801
±1
±0.5
SON-8
DRB
SPECIFIED
TEMPERATURE
RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PACKAGE
MARKING
F01
F01
E01
E01
ORDERING
NUMBER
DAC8801IDGKT
DAC8801IDGKR
DAC8801IDRBT
DAC8801IDRBR
TRANSPORT
MEDIA,
QUANTITY
Tape and Reel,
250
Tape and Reel,
2500
Tape and Reel,
250
Tape and Reel,
2500
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this data sheet, or refer to our
web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
VDD to GND
Digital Input voltage to GND
VOUT to GND
Operating temperature range
Storage temperature range
Junction temperature range (TJ max)
Power dissipation
Thermal impedance, RΘJA
Lead temperature, soldering
Lead temperature, soldering
ESD rating, HBM
ESD rating, CDM
Vapor phase (60s)
Infrared (15s)
DAC8801
-0.3 to +7
-0.3 to +VDD + 0.3
-0.3 to +VDD + 0.3
-40 to +105
-65 to +150
+125
(TJ max - TA) / RΘJA
+55
+215
+220
1500
1000
UNITS
V
V
V
°C
°C
°C
W
°C/W
°C
°C
V
V
(1) Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to absolute
maximum conditions for extended periods may affect device reliability.
2



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DAC8801
www.ti.com
SLAS403A – NOVEMBER 2004 – REVISED DECEMBER 2004
ELECTRICAL CHARACTERISTICS
VDD = +2.7 V to +5.5 V; IOUT = Virtual GND, GND = 0 V; VREF = 10 V; TA = Full Operating Temperature; all specifications
-40°C to +85°C unless otherwise noted.
PARAMETER
CONDITIONS
STATIC PERFORMANCE
Resolution
Relative accuracy
Differential nonlinearity
Output leakage current
Output leakage current
Full-scale gain error
Data = 0000h, TA = 25°C
Data = 0000h, TA = TMAX
All ones loaded to DAC register
Full-scale tempco
OUTPUT CHARACTERISTICS(1)
Output current
Output capacitance
Code dependent
REFERENCE INPUT
VREF Range
Input resistance
Input capacitance
LOGIC INPUTS AND OUTPUT(1)
Input low voltage
Input low voltage
Input high voltage
Input high voltage
Input leakage current
Input capacitance
INTERFACE TIMING
VIL VDD = +2.7V
VIL VDD = +5V
VIH VDD = +2.7V
VIH VDD = +5V
IIL
CIL
Clock input frequency
Clock pulse width high
fCLK
Clock pulse width low
CS to Clock setup time
Clock to CS hold time
Data setup time
Data hold time
POWER REQUIREMENTS
VDD
IDD (normal operation)
VDD = +4.5V to +5.5V
VDD = +2.7V to +3.6V
AC CHARACTERISTICS
Logic inputs = 0 V
VIH = VDD and VIL = GND
VIH = VDD and VIL = GND
Output voltage settling time
Reference multiplying BW
DAC glitch impulse
Feedthrough error
Digital feedthrough
VREF = 5 VPP, Data = 3FFFh
VREF = 0 V, Data = 3FFFh to 2000h
VREF = 100 mVRMS, 100kHz, Data = 0000h
Total harmonic distortion
100Hz to 20kHz
Output spot noise voltage
f = 1 kHz, BW = 1 Hz
DAC8801
MIN TYP MAX
14
±1
±0.5
10
10
±1 ±4
±3
2
50
-15
5
5
15
0.6
0.8
2.1
2.4
10
10
50
10
10
0
10
5
10
2.7 5.5
5
35
1 2.5
0.5
10
2
-70
2
-105
12
UNITS
Bits
LSB
LSB
nA
nA
mV
ppm of FSR/°C
mA
pF
V
k
pF
V
V
V
V
µA
pF
MHz
ns
ns
ns
ns
ns
ns
V
µA
µA
µA
µs
MHz
nV/s
dB
nV/s
dB
nV/Hz
(1) Specified by design and characterization, not production tested.
3



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DAC8801
SLAS403A – NOVEMBER 2004 – REVISED DECEMBER 2004
PIN ASSIGNMENTS
DRB PACKAGE
(TOP VIEW)
DGK PACKAGE
(TOP VIEW)
CLK
SDI
RFB
VREF
1
2
3
4
8 CS
7 VDD
6 GND
5 IOUT
CLK
SDI
RFB
VREF
1
2
3
4
8
7
6
5
www.ti.com
CS
VDD
GND
IOUT
TERMINAL FUNCTIONS
PIN NAME
DESCRIPTION
1 CLK Clock input, positive edge triggered clocks data into shift register
2
SDI
Serial register input, data loads directly into the shift register MSB first. Extra leading
bits are ignored.
3 RFB Internal matching feedback resistor. Connect to external op amp output.
4
VREF
DAC reference input pin. Establishes DAC full-scale voltage. Constant input resistance
versus code.
5 IOUT DAC current output. Connects to inverting terminal of external precision I to V op amp.
6
GND
Analog and digital ground
7 VDD Posiitve power supply input. Specified range of operation 2.7 V to 5.5 V.
8
CS
Chip select, active low digital input. Transfers shift register data to DAC register on
rising edge. See Table 1 for operation.
4



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