BD14000EFV-C Datasheet PDF - Rohm

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BD14000EFV-C
Rohm

Part Number BD14000EFV-C
Description Cell Balance LSI of 4 to 6 Series Power Storage Element Cells
Page 21 Pages


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Datasheet
Simple design with built-in self-controlled cell balance features circuit
Cell Balance LSI of 4 to 6 Series Power
Storage Element Cells for Automotive
BD14000EFV-C
General Description
BD14000EFV is a LSI IC designed as a self-controlled
cell balancer. It has a built-in shunt-type power storage
element balancer function that can respond to 4 to 6
cells. All the functions necessary in a cell balancer are
built-in making power storage element cell balancing
possible only in this LSI.
This chip can be used for electric double layer
capacitors (EDLC) with cell detection voltage range of
2.4V to 3.1V and power storage capacitors which is
important for cell balancers with similar electrical
characteristics
Key Specifications
Input Voltage Range8.0V to 24.0V
Cell Voltage Detection Range2.4V to 3.1V
Cell Voltage Detection Accuracy:③1(Max. at
25°C)
Shunt Switch ON Resistance1(Typ.)
Operating Temp. Range -40°C to +105°C
Package
HTSSOP-B30
W (Typ) x D (Typ) x H (Max)
10.00mm x 7.60mm x 1.00mm
It has a built-in multiple over-voltage detection function
and can also detect abnormal mode such as any
characteristic deterioration in cells.
Also, application-dependent operation can be set since
enable control is possible.
Features
AEC-Q100 qualified(Note1)
All EDLC cell balancer functions are integrated on
a single chip
Self- controlled EDLC balance function
Adopts shunt resistance method for simple
balancing
4 to 6 cell series connection ready
Multiple chip series connection is possible
Built-in over-voltage detection flag output
Detection voltage can be set
(Note1 : Grade2)
Applications
Renewable energy power storage for Automotive,
Production machinery, Building machinery, etc.
UPS and other devices that stabilizes power
supplies
HTSSOP-B30
Typical Application Circuit
Figure 1 Typical application circuit
Product structure : Silicon monolithic integrated circuit
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BD14000EFV-C
Pin Configuration
Datasheet
T
_
_
_
TT
_
T
T
T
Figure 2 Pin Configuration
Pin Description
PIN No. Symbol
Function
PIN No.
Symbol
Function
Positive (+) connection terminal
1 C6 pin of cell 6
16
C1
Positive (+) connection terminal pin of
cell 1
2
D6
Shunt switch connection terminal
pin for cell 6.
17
D1
Shunt switch connection terminal pin for
cell 1
3
S6
Shunt switch connection terminal
pin for cell 6.
18
S1
Shunt switch connection terminal pin for
cell 1
4
C5
Positive (+) connection terminal
pin of cell 5
19
VSS
Analog ground (connect to (-) side of
bottom cell)
5
D5
Shunt switch connection terminal
pin for cell 5.
20
VSET2
Detection voltage setting input pin 2
6
S5
Shunt switch connection terminal
pin for cell 5.
21
VSET1
Detection voltage setting input pin 1
7
C4
Positive (+) connection terminal
pin of cell 4.
22
VSET0
Detection voltage setting input pin 0
8
D4
Shunt switch connection terminal
pin for cell 4.
23 OVLOSEL Over-voltage detection setting input pin
9
S4
Shunt switch connection terminal
pin for cell 4.
24
TEST0
TEST terminal pin (connect to VSS)
10
C3
Positive (+) connection terminal
pin of cell 3.
25 ENIN Enable signal input pin
11
D3
Shunt switch connection terminal
pin for cell 3.
26
VO_OK
Self-Check OK signal output pin
12
S3
Shunt switch connection terminal
pin for cell 3.
27 VO_OVLO2 Overvoltage flag output pin 2
13
C2
Positive (+) connection terminal
pin of cell 2
28 VO_OVLO1 Overvoltage flag output pin 1
14
D2
Shunt switch connection terminal
pin for cell 2.
29
VREG
Regulator circuit output pin
(output capacitor : 1.0µF)
15
S2
Shunt switch connection terminal
pin for cell 2.
30
VCC Regulator circuit power input pin
The back PAD is used for enhancing the radiation of heat. This PAD is needed to connect VSS.
TEST0 : This pin is used for ROHM internal test. This pin is needed to connect VSS for normal operation.
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BD14000EFV-C
Block Diagram
Datasheet
T
T
T
T
T
,
T
,
T
T
T
T
_
_
_
TT
Figure 3 Block Diagram
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BD14000EFV-C
Datasheet
Description of Blocks
CONTROL block
1. Cell voltage detection block
Setting the detection voltage is possible with cell balance voltage detection and two types of OVLO available
for each cell.
Additionally, protection detection error can be controlled by setting delays for each voltage detection.
2. Detect control block
ON/OFF control is possible by setting the ENIN pin.
Additionally, cell detection voltages can be set via VSET0, 1, 2 and OVLOSEL pins.
REG block
This is used as a power block for the chip’s internal blocks.
This block can also be used as I/F power source of control input/output.
Shunt SW
Shunt Switch is used for the cell balancing function.
SWDET
SWDET detects if the drain pins (D1~D6) are normally changed to “L” when cell balance voltage is
detected as a self-check function
Flag output
2 types of OVLO are output from VO_OVLO1, 2. Self-check function is output from VO_OK.
Absolute Maximum Ratings (Ta = 25°C)
Parameter
Supply Voltage
VCC,VCn(n=6) to VSS
Supply Voltage
VCn to Vcn-1(n=2~6)
VC1 to VSS
VDn to Vsn (n=1~6)
Supply Voltage
VREG,ENIN,VO_OVLO1,VO_OVLO2,
VO_OK,OVLOSEL,VSET0,VSET1,
VSET2,TEST0 to VSS
Power Dissipation
Symbol
V1-1
V2-1
V2-2
Pd
Rating
-0.3 to 28
-0.3 to 7
-0.3 to 7
1.55 *1
Unit
V
V
V
W
Operating Temperature Range
Topr
-40 to +105
°C
Storage Temperature Range
Tstg
-55 to 150
°C
*1 This value is for ROHM standard board (1 layer 70x70x1.6mm) mounting. For temperatures above 25°C, use a 12.4mW/°C derating factor.
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in cases where the IC is
operated over the absolute maximum ratings.
Recommended Operating Conditions (Ta= -40°C to +105°C)
Parameter
Symbol
Rating
VCC Voltage
VCC
8.0 to 24
Unit
V
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BD14000EFV-C Cell Balance LSI of 4 to 6 Series Power Storage Element Cells BD14000EFV-C
Rohm
BD14000EFV-C pdf

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