B7NK80Z Datasheet PDF - STMicroelectronics

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B7NK80Z
STMicroelectronics

Part Number B7NK80Z
Description STB7NK80Z
Page 17 Pages


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STB7NK80Z, STB7NK80Z-1
STP7NK80ZFP, STP7NK80Z
N-channel 800 V, 1.5 , 5.2 A, TO-220,TO-220FP,D2PAK,I2PAK
Zener-protected SuperMESH™ Power MOSFET
Features
Type
VDSS
(@Tjmax)
STP7NK80Z
STP7NK80ZFP
STB7NK80Z
STB7NK80Z-1
800V
800V
800V
800V
RDS(on)
< 1.8
< 1.8
< 1.8
< 1.8
ID
5.2A
5.2A
5.2A
5.2A
Extremely high dv/dt capability
100% avalanche tested
Gate charge minimized
Very low intrinsic capacitances
Very good manufacturing repeatability
Applications
Switching application
Description
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established
strip-based PowerMESH™ layout. In addition to
pushing on-resistance significantly down, special
care is taken to ensure a very good dv/dt
capability for the most demanding applications.
Such series complements ST full range of high
voltage Power MOSFETs including revolutionary
MDmesh™ products.
TO-220
3
2
1
TO-220FP
3
1
D2PAK
123
I2PAK
Figure 1. Internal schematic diagram
D(2)
G(1)
S(3)
AM01476v1
Table 1. Device summary
Order codes
Marking
STB7NK80ZT4
STB7NK80Z-1
STP7NK80Z
STP7NK80ZFP
B7NK80Z
B7NK80Z
P7NK80Z
P7NK80ZFP
Package
D²PAK
I²PAK
TO-220
TO-220FP
Packaging
Tape e reel
Tube
March 2010
Doc ID 8979 Rev 6
1/17
www.st.com
17



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Contents
Contents
STB7NK80Z, STB7NK80Z-1, STP7NK80ZFP, STP7NK80Z
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2/17 Doc ID 8979 Rev 6



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STB7NK80Z, STB7NK80Z-1, STP7NK80ZFP, STP7NK80Z
1 Electrical ratings
Electrical ratings
Table 2. Absolute maximum ratings
Symbol
Parameter
Value
Unit
TO-220 D2PAK I2PAK TO-220FP
VDS
VGS
ID
ID
IDM (2)
PTOT
Drain-source voltage (VGS = 0)
Gate- source voltage
Drain current (continuous) at TC = 25 °C
Drain current (continuous) at TC = 100 °C
Drain current (pulsed)
Total dissipation at TC = 25°C
Derating factor
VESD(G-S)
Gate source ESD
(HBM-C=100 pF, R=1.5 kΩ)
dv/dt (3) Peak diode recovery voltage slope
VISO
Insulation withstand voltage (RMS) from
all three leads to external heat sink
(t=1 s; TC= 25 °C)
Tj Max operating junction temperature
Tstg Storage temperature
1. Limited only by maximum temperature allowed
2. Pulse width limited by safe operating area
3. ISD 5.2 A, di/dt 200 A/µs, VDD V(BR)DSS, Tj TJMAX.
800
± 30
5.2
3.3
20.8
125
1
4000
4.5
5.2 (1)
3.3 (1)
20.8(1)
30
0.24
V
V
A
A
A
W
W/°C
V
V/ns
2500
V
-55 to 150
°C
°C
Table 3. Thermal data
Symbol
Parameter
Value
Unit
TO-220 D2PAK I2PAK TO-220FP
Rthj-case Thermal resistance junction-case max
Rthj-amb Thermal resistance junction-ambient max
Tl
Maximum lead temperature for soldering
purpose
1
62.5
300
4.2 °C/W
°C/W
°C
Table 4.
Symbol
Avalanche characteristics
Parameter
Avalanche current, repetitive or not-repetitive
IAR (pulse width limited by Tj Max)
Single pulse avalanche energy
EAS (starting TJ = 25 °C, ID = IAR, VDD = 50 V)
Value
5.2
210
Unit
A
mJ
Doc ID 8979 Rev 6
3/17



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Electrical characteristics
STB7NK80Z, STB7NK80Z-1, STP7NK80ZFP, STP7NK80Z
2 Electrical characteristics
(TCASE = 25 °C unless otherwise specified)
Table 5.
Symbol
On/off states
Parameter
Drain-source
V(BR)DSS Breakdown voltage
IDSS
IGSS
VGS(th)
RDS(on)
Zero gate voltage
Drain Current (VGS = 0)
Gate-body leakage
Current (VDS = 0)
Gate threshold voltage
Static drain-source on
resistance
Test conditions
Min. Typ. Max. Unit
ID =1 mA, VGS = 0
800
V
VDS = Max rating
VDS = Max rating, TC = 125 °C
1 µA
50 µA
VGS = ± 20 V
± 10 µA
VDS = VGS, ID = 100 µA
3 3.75 4.5 V
VGS = 10 V, ID = 2.6 A
1.5 1.8
Table 6. Dynamic
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
gfs (1)
Ciss
Coss
Crss
Forward transconductance VDS = 15 V, ID = 2.6 A
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS = 25 V, f = 1 MHz,
VGS = 0
-5
1138
- 122
25
S
pF
pF
pF
Coss eq. Equivalent output
(2) capacitance
VDS =0 , VDS = 0 to 640 V
- 50
pF
td(on)
tr
tr(off)
tr
Turn-on delay time
Rise time
Turn-off delay time
Fall time
VDD = 400 V, ID = 2.6 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 17)
20
12
-
45
20
ns
ns
ns
ns
Qg Total gate charge
Qgs Gate-source charge
Qgd Gate-drain charge
VDD = 640 V, ID = 5.2 A,
VGS = 10 V
(see Figure 18)
40 56 nC
-7
nC
21 nC
tr(Voff)
tr
tc
Off-voltage rise time
Fall time
Cross-over time
VDD = 640 V, ID = 5.2 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 17)
12
- 10
20
ns
ns
ns
1. Pulsed: pulse duration=300µs, duty cycle 1.5%
2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS.
4/17 Doc ID 8979 Rev 6



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