2.2 General Description
The ATR0635 has been designed especially for mobile applications. It provides high isolation
between GPS and cellular bands, as well as very low power consumption.
ATR0635 is based on the successful ANTARIS4 technology which includes the ANTARIS high
performance SuperSense software in ROM, developed by u-blox AG, Switzerland. ANTARIS
provides a proven navigation engine which is used in high-end car navigation systems, auto-
matic vehicle location (AVL), security and surveying systems, traffic control, road pricing, and
speed camera detectors, and provides location-based services (LBS) worldwide.
The ANTARIS4 chipset has a very low power consumption and comes with a very low BoM for
the passive components. Also, as the high performance software SuperSense is available in
ROM, no external flash memory is needed.
The L input signal (fRF) is a Direct Sequence Spread Spectrum (DSSS) signal with a center fre-
quency of 1575.42 MHz. The digital modulation scheme is Bi-Phase-Shift-Keying (BPSK) with a
chip rate of 1.023 Mbps.
2.3 PMSS Logic
The power management, startup and shutdown (PMSS) logic ensures reliable operation within
the recommended operating conditions. The external power control signals PUrf and PUxto are
passed through Schmitt trigger inputs to eliminate voltage ripple and prevent undesired behavior
during start-up and shut-down. Digital and analog supply voltages are analyzed by a monitoring
circuit, enabling the startup of the IC only when it is within a safe operating range.
The frequency synthesizer features a balanced VCO and a fully integrated loop filter, thus no
external components are required. The VCO combines very good phase noise behavior and
excellent spurious suppression.The relation between the reference frequency (fTCXO) and the
VCO center frequency (fTCXO) is given by:
fVCO = fTCXO × 64 = 23.104 MHz × 64 = 1478.656 MHz.
2.5 RF Mixer/Image Filter
Combined with the antenna, an external LNA provides a first band-path filtering of the signal.
Atmel’s ATR0610 is recommended for the LNA due to its low noise figure, high linearity and low
power consumption. The output of the LNA drives a SAW filter, which provides image rejection
for the mixer and the required isolation to all GSM bands. The output of the SAW filter is fed into
a highly linear mixer with high conversion gain and excellent noise performance.
The on-chip automatic gain control (AGC) stage sets the gain of the VGA in order to optimally
load the input of the following analog-to-digital converter. The AGC control loop can be selected
for on-chip closed-loop operation or for baseband controlled gain mode.
4 ATR0635 [Preliminary]