ATF-55143 Datasheet PDF

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ATF-55143

Low Noise Enhancement Mode Pseudomorphic HEMT

in a Surface Mount Plastic Package

Data Sheet

Description

Avago Technologies’ ATF-55143 is a high dynamic range,

very low noise, single supply E-PHEMT housed in a

4-lead SC-70 (SOT-343) surface mount plastic package.

The combination of high gain, high linearity and low

noise makes the ATF-55143 ideal for cellular/PCS hand-

sets, wireless data systems (WLL/RLL, WLAN and MMDS)

and other systems in the 450 MHz to 6 GHz frequency

range.

Surface Mount Package SOT-343

Pin Connections and Package Marking

DRAIN

SOURCE

GATE

Note:

Top View. Package marking provides orientation and identification

“5F” = Device Code

“x” = Date code character identifies month of manufacture.

Features

 High linearity performance

 Single Supply Enhancement Mode Technology[1]

 Very low noise figure

 Excellent uniformity in product specifications

 400 micron gate width

 Low cost surface mount small plastic package SOT-

343 (4 lead SC-70)

 Tape-and-Reel packaging option available

 Lead Free Option Available

Specifications

 2 GHz; 2.7V, 10 mA (Typ.)

 24.2 dBm output 3rd order intercept

 14.4 dBm output power at 1 dB gain compression

 0.6 dB noise figure

 17.7 dB associated gain

 Lead-free option available

Applications

 Low noise amplifier for cellular/PCS handsets

 LNA for WLAN, WLL/RLL and MMDS applications

 General purpose discrete E-PHEMT for other ultra low

noise applications

Note:

1. Enhancement mode technology requires positive Vgs, thereby

eliminating the need for the negative gate voltage associated with

conventional depletion mode devices.

Attention: Observe precautions for

handling electrostatic sensitive devices.

ESD Machine Model (Class A)

ESD Human Body Model (Class 0)

Refer to Avago Application Note A004R:

Electrostatic Discharge Damage and Control.

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ATF-55143 Absolute Maximum Ratings[1]

Symbol

Parameter

diss

Pin max.

Drain-Source Voltage[2]

Gate-Source Voltage[2]

Gate Drain Voltage [2]

Drain Current[2]

Gate Current[5]

Total Power Dissipation [3]

RF Input Power[5]

(Vds=2.7V, Ids=10mA)

(Vds=0V, Ids=0mA)

T Channel Temperature

T Storage Temperature

STG

jc Thermal Resistance [4]

 ESD (Human Body Model)

 ESD (Machine Model)

Notes:

1. Operation of this device above any one of these parameters may

cause permanent damage.

2. Assumes DC quiescent conditions.

3. Source lead temperature is 25°C. Derate 4.3 mW/°C for T > 87°C.

4. Thermal resistance measured using 150°C Liquid Crystal Measure-

ment method.

5. Device can safely handle +10 dBm RF Input Power as long as I is

limited to 1 mA. I at P drive level is bias circuit dependent. See

GS 1dB

applications section for additional information.

Units

Absolute

Maximum

-5 to 1

100

270

dBm

°C

°C/W

150

-65 to 150

235

200

0.7 V

40 0.6V

20 0.5V

0 12 3 4

VDS (V)

Figure 1. Typical I-V Curves.

(VGS = 0.1 V per step)

0.4 V

0.3V

Product Consistency Distribution Charts [6,7]

300 200

Cpk = 2.02

Cpk = 1.023

250

Stdev = 0.36

Stdev = 0.28

160

240

200

-3 Std

150

100

160

120

-3 Std

+3 Std

120

+3 Std

50 40 40

Cpk = 3.64

Stdev = 0.031

22 23 24 25

OIP3 (dBm)

Figure 2. OIP3 @ 2.7 V, 10 mA.

LSL = 22.0, Nominal = 24.2

15 16 17 18 19

GAIN (dB)

Figure 3. Gain @ 2.7 V, 10 mA.

USL = 18.5, LSL = 15.5, Nominal = 17.7

0.43 0.53 0.63 0.73 0.83 0.93

NF (dB)

Figure 4. NF @ 2.7 V, 10 mA.

USL = 0.9, Nominal = 0.6

Notes:

6. Distribution data sample size is 500 samples taken from 6 different wafers. Future wafers allocated to this product may have nominal values

anywhere between the upper and lower limits.

7. Measurements made on production test board. This circuit represents a trade-off between an optimal noise match and a realizeable match

based on production test equipment. Circuit losses have been de-embedded from actual measurements.

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ATF-55143 Electrical Specifications

T = 25°C, RF parameters measured in a test circuit for a typical device

Symbol Parameter and Test Condition

Units

Vgs Operational Gate Voltage

Vds = 2.7V, Ids = 10 mA

Vth Threshold Voltage

Vds = 2.7V, Ids = 2 mA

Idss Saturated Drain Current

Vds = 2.7V, Vgs = 0V

Gm Transconductance

Vds = 2.7V, gm = Idss/Vgs;

Vgs = 0.75 – 0.7 = 0.05V

Igss Gate Leakage Current

Vgd = Vgs = -2.7V

NF Noise Figure [1]

f = 2 GHz Vds = 2.7V, Ids = 10 mA

f = 900 MHz Vds = 2.7V, Ids = 10 mA

Associated Gain [1]

f = 2 GHz Vds = 2.7V, Ids = 10 mA

f = 900 MHz Vds = 2.7V, Ids = 10 mA

OIP3

Output 3rd Order

Intercept Point [1]

f = 2 GHz Vds = 2.7V, Ids = 10 mA

f = 900 MHz Vds = 2.7V, Ids = 10 mA

P1dB

1dB Compressed

Output Power [1]

f = 2 GHz Vds = 2.7V, Ids = 10 mA

f = 900 MHz Vds = 2.7V, Ids = 10 mA

Notes:

1. Measurements obtained using production test board described in Figure 5.

2. Typical values determined from a sample size of 500 parts from 6 wafers.

μA

mmho

μA

dBm

Min.

0.3

0.18

—

110

—

15.5

—

22.0

—

Typ.[2]

0.47

0.37

0.1

220

—

0.6

0.3

17.7

21.6

24.2

22.3

14.4

14.2

Max.

0.65

0.53

285

0.9

—

18.5

—

Input

50 Ohm

Input

Output

50 Ohm

Output

Transmission

Matching Circuit

Transmission

Line Including

Γ_mag = 0.4

DUT Γ_mag = 0.5

Line Including

Gate Bias T

Γ_ang = 83°

Γ_ang = -26°

Drain Bias T

(0.3 dB loss)

(1.2 dB loss)

(0.3 dB loss)

Figure 5. Block diagram of 2 GHz production test board used for Noise Figure, Associated Gain, P1dB, OIP3, and IIP3 measurements. This circuit represents a trade-off between

an optimal noise match, maximum OIP3 match and associated impedance matching circuit losses. Circuit losses have been de-embedded from actual measurements.

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ATF-55143 Typical Performance Curves

30 1.2

2V, 10 mA

2.7V, 10 mA

012 3 456

FREQUENCY (GHz)

Figure 6. Gain vs. Bias over Frequency.[1]

1.0

0.8

0.6

0.4

0.2

2V, 10 mA

2.7V, 10 mA

012 3 456

FREQUENCY (GHz)

Figure 7. Fmin vs. Frequency and Bias.

2V, 10 mA

2.7V, 10 mA

012 3 456

FREQUENCY (GHz)

Figure 8. OIP3 vs. Bias over Frequency.[1]

2V, 10 mA

2.7V, 10 mA

-5

012 3 456

FREQUENCY (GHz)

Figure 9. IIP3 vs. Bias over Frequency.[1]

2V, 10 mA

2.7V, 10 mA

012 3 456

FREQUENCY (GHz)

Figure 10. P1dB vs. Bias over Frequency.[1,2]

16 2.7V

0 5 10 15 20 25 30 35

Ids (mA)

Figure 11. Gain vs. Ids and Vds at 2 GHz.[1]

0.60

0.55

0.50

0.45

0.40

0.35

0.30 2V

2.7V

0.25 3V

0.20

0 5 10 15 20 25 30 35

Ids (mA)

Figure 12. Fmin vs. Ids and Vds at 2 GHz.

23 2V

2.7V

21 3V

0 5 10 15 20 25 30 35

Ids (mA)

Figure 13. OIP3 vs. Ids and Vds at 2 GHz.[1]

4 2V

2.7V

2 3V

0 5 10 15 20 25 30 35

Ids (mA)

Figure 14. IIP3 vs. Ids and Vds at 2 GHz.[1]

Notes:

1. Measurements at 2 GHz were made on a fixed tuned production test board that was tuned for optimal OIP3 match with reasonable noise figure

at 2.7 V, 10 mA bias. This circuit represents a trade-off between optimal noise match, maximum OIP3 match and a realizable match based on

production test board requirements. Measurements taken above and below 2 GHz were made using a double stub tuner at the input tuned for

low noise and a double stub tuner at the output tuned for maximum OIP3. Circuit losses have been de-embedded from actual measurements.

2. P1dB measurements are performed with passive biasing. Quiescent drain current, I , is set with zero RF drive applied. As P1dB is approached,

dsq

the drain current may increase or decrease depending on frequency and dc bias point. At lower values of I , the device is running close to class

dsq

B as power output approaches P1dB. This results in higher P1dB and higher PAE (power added efficiency) when compared to a device that is

driven by a constant current source as is typically done with active biasing. As an example, at a V = 2.7V and I = 5 mA, I increases to 15 mA

DS dsq d

as a P1dB of +14.5 dBm is approached.

AVAGO	Part Number	ATF-55143
	Description	Low Noise Enhancement Mode Pseudomorphic HEMT
	Page	20 Pages

ATF-55143 Datasheet PDF - AVAGO