ATF-38143 Datasheet PDF - AVAGO

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ATF-38143
AVAGO

Part Number ATF-38143
Description Low Noise Pseudomorphic HEMT
Page 12 Pages


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ATF-38143
Low Noise Pseudomorphic HEMT
in a Surface Mount Plastic Package
Data Sheet
Description
Avago Technologies’s ATF-38143 is a high dynamic
range, low noise, PHEMT housed in a 4-lead SC-70 (SOT-
343) surface mount plastic package.
Based on its featured performance, ATF-38143 is suitable
for applications in cellular and PCS handsets, LEO
systems, MMDS, and other systems requiring super
low noise figure with good intercept in the 450 MHz to
10 GHz frequency range.
Surface Mount Package SOT-343
Pin Connections and Package Marking
DRAIN
SOURCE
SOURCE
GATE
Note:
Top View. Package marking provides orientation and identification.
“8P” = Device code
“x” = Date code character.
A new character is assigned for each month, year.
Features
Lead-free Option Available
Low Noise Figure
Excellent Uniformity in Product Specifications
Low Cost Surface Mount Small Plastic Package
SOT-343 (4 lead SC-70)
Tape-and-Reel Packaging Option Available
Specifications
1.9 GHz; 2 V, 10 mA (Typ.)
0.4 dB Noise Figure
16 dB Associated Gain
12.0 dBm Output Power at 1 dB Gain Compression
22.0 dBm Output 3rd Order Intercept
Applications
Low Noise Amplifier for Cellular/PCS Handsets
LNA for WLAN, WLL/RLL, LEO, and MMDS
Applications
General Purpose Discrete PHEMT for Other Ultra Low
Noise Applications
Attention: Observe precautions for
handling electrostatic sensitive devices.
ESD Machine Model (Class A)
ESD Human Body Model (Class 1)
Refer to Avago Application Note A004R:
Electrostatic Discharge Damage and Control.



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ATF-38143 Absolute Maximum Ratings[1]
Symbol
VDS
VGS
VGD
IDS
Pdiss
Pin max
TCH
TSTG
jc
Parameter
Drain - Source Voltage[2]
Gate - Source Voltage
Gate Drain Voltage
Drain Current
Total Power Dissipation[2]
RF Input Power
Channel Temperature
Storage Temperature
Thermal Resistance[3]
Units
V
V
V
mA
mW
dBm
°C
°C
°C/W
Absolute
Maximum
4.5
-4
-4
Idss
580
17
160
-65 to 160
165
Notes:
1. Operation of this device above any one of
these parameters may cause permanent
damage.
2. Source lead temperature is 25°C. Derate
6 mW/°C for TL > 64°C.
3. Thermal resistance measured using 150°C
Liquid Crystal Measurement method.
Product Consistency Distribution Charts
250
+0.6 V
200
150 0 V
100
50
–0.6 V
0
012 34 5
VDS (V)
Figure 1. Typical I-V Curves. (VGS=-0.2V per step)
180
150
120
-3 Std
+3 Std
90
Cpk = 4.08938
Stdev = 0.03 dB
6 Wafers
Sample Size = 450
60
30
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
NF (dB)
Figure 3. NF @ 2 GHz, 2 V, 10 mA.
LSL=0, Nominal=0.44, USL=0.85
300
250
200
-3 Std
150
+3 Std
Cpk = 1.59062
Stdev = 0.73 dBm
6 Wafers
Sample Size = 450
100
50
0
18 20 22 24
OIP3 (dB)
Figure 2. OIP3 @ 2 GHz, 2 V, 10 mA.
LSL=18.5, Nominal=21.99, USL=26.0
26
160
120
-3 Std +3 Std
80
Cpk = 2.58097
Stdev = 0.14 dB
6 Wafers
Sample Size = 450
40
0
15 15.5
16 16.5 17 17.5 18
GAIN (dB)
Figure 4. Gain @ 2 GHz, 2 V, 10 mA.
LSL=15.0, Nominal=16.06, USL= 18.0
Note:
Distribution data sample size is 450 samples taken from 6 different
wafers. Future wafers allocated to this product may have nominal values
anywhere within the upper and lower spec limits. Measurements made
on production test board. This circuit represents a trade-off between
an optimal noise match and a realizeable match based on production
test requirements. Circuit losses have been de-embedded from actual
measurements.
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ATF-38143 Electrical Specifications TA = 25°C, RF parameters measured in a test circuit for a typical device
Symbol
Parameters and Test Conditions
Units Min. Typ.[2]
Idss [1]
VP [1]
Id
gm[1]
IGDO
Igss
Saturated Drain Current VDS = 1.5 V, VGS = 0 V
Pinchoff Voltage
VDS = 1.5 V, IDS = 10% of Idss
Quiescent Bias Current VGS = -0.54 V, VDS = 2 V
Transconductance
VDS = 1.5 V, gm = Idss /VP
Gate to Drain Leakage Current
VGD = -5 V
Gate Leakage Current
VGD = VGS = -4 V
mA 90
V -0.65
mA —
mmho 180
μA
μA —
118
- 0.5
10
230
30
NF Noise Figure
Ga Associated Gain[3]
OIP3
IIP3
P1dB
Output 3rd Order
Intercept Point[3]
Input 3rd Order
Intercept Point[3]
1 dB Compressed
Compressed Power[3]
f = 2 GHz
f = 900 MHz
f = 2 GHz
f = 900 MHz
f = 2 GHz
f = 900 MHz
f = 2 GHz
f = 900 MHz
f = 2 GHz
f = 900 MHz
VDS = 2 V, IDS = 5 mA
VDS = 2 V, IDS = 10 mA
VDS = 2 V, IDS = 20 mA
VDS = 2 V, IDS = 5 mA
VDS = 2 V, IDS = 10 mA
VDS = 2 V, IDS = 20 mA
VDS = 2 V, IDS = 5 mA
VDS = 2 V, IDS = 10 mA
VDS = 2 V, IDS = 20 mA
VDS = 2 V, IDS = 5 mA
VDS = 2 V, IDS = 10 mA
VDS = 2 V, IDS = 20 mA
VDS = 2 V, IDS = 10 mA
VDS = 2 V, IDS = 10 mA
VDS = 2 V, IDS = 10 mA
VDS = 2 V, IDS = 10 mA
VDS = 2 V, IDS = 10 mA
VDS = 2 V, IDS = 10 mA
dB 0.6
0.4
0.3
dB 0.6
0.4
0.3
dB 15.3
15 16.0
17.0
dB 17.0
19.0
20.5
dBm 18.5 22.0
dBm 22.0
dBm 6.0
dBm 3.0
dBm 12.0
dBm 12.0
Notes:
1. Guaranteed at wafer probe level.
2. Typical value determined from a sample size of 450 parts from 6 wafers.
3. Measurements obtained using production test board described in Figure 5.
Max.
145
-0.35
500
300
0.85
18
Input
50 Ohm
Transmission Line
(0.5 dB loss)
Input
Matching Circuit
Γmag = 0.380
Γang = 58.2°
(0.46 dB loss)
DUT
Output
Matching Circuit
Γmag = 0.336
Γang = 34.5°
(0.46 dB loss)
50 Ohm
Transmission Line
(0.5 dB loss)
Output
Figure 5. Block diagram of 2 GHz production test board used for Noise Figure, Associated Gain, P1dB, and OIP3 measurements. This circuit represents a trade-
off between an optimal noise match and a realizable match based on production test board requirements. Circuit losses have been de-embedded from
actual measurements.
3



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ATF-38143 Typical Performance Curves
30
OIP3
25
30
25
OIP3
20 20
15
P1dB
10
15
P1dB
10
55
0
0 10 20 30 40 50
CURRENT, IDS (mA)
Figure 6. OIP3 and P1dB vs. Id at 2V, 2 GHz.
60
0
0 10 20 30 40 50
CURRENT, IDS (mA)
Figure 7. OIP3 and P1dB vs. Id at 2V, 900 MHz.
60
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0 10 20 30 40 50
CURRENT, IDS (mA)
Figure 8. Noise Figure vs. Id at 2V, 2 GHz.
60
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0 10 20 30 40 50
CURRENT, IDS (mA)
Figure 9. Noise Figure vs. Id at 2V, 900 MHz.
60
22
21
20
19
18
17
16
15
0 10 20 30 40 50
CURRENT, IDS (mA)
Figure 10. Associated Gain vs. Id at 2V, 2 GHz.
60
22
21
20
19
18
17
16
15
0 10 20 30 40 50 60
CURRENT, IDS (mA)
Figure 11. Associated Gain vs. Id at 2V, 900 MHz.
Notes:
1. Measurements made on a fixed tuned production test board that was tuned for optimal gain match with reasonable noise figure at 2 V 10 mA
bias. This circuit represents a trade-off between an optimal noise match, maximum gain match and a realizable match based on production test
board requirements. Circuit losses have been de-embedded from actual measurements.
2. P1dB measurements are performed with passive biasing. Quiescent drain current, IDSQ, is set with zero RF drive applied. As P1dB is approached, the
drain current may increase or decrease depending on frequency and dc bias point. At lower values of IDSQ the device is running closer to class B
as power output approaches P1dB. This results in higher P1dB and higher PAE (power added efficiency) when compared to a device that is driven
by a constant current source as is typically done with active biasing.
4



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