ATA5575M2 Datasheet PDF - ATMEL Corporation

ATMEL Corporation

Part Number ATA5575M2
Description Read/Write LF RFID IDIC 100kHz to 150kHz
Page 26 Pages

ATA5575M2 datasheet pdf
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Read/Write LF RFID IDIC 100kHz to 150kHz
Contactless power supply
Contactless read/write data transmission
Radio frequency fRF from 100kHz to 150kHz
128-bit EEPROM user memory: 16 Bytes (8 Bits each)
8-bit configuration memory
High Q-antenna tolerance due to built-in options
Animal ID, waste management, industrial identification
ISO/IEC 11784/785 compatibility
On-chip trimmed antenna capacitor
330pF ±3%
250pF ±3%
Mega pads 200µm x 400µm
Mega pads 200µm x 400µm with 25µm gold bumps for direct coil bonding
Other options:
Direct access mode
OTP functionality

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1. Description
The Atmel® ATA5575M2 is a contactless read/write identification IC (IDIC®) for applications in the 100-kHz to 150-kHz
frequency band. A single coil connected to the chip serves as the IC's power supply and bi-directional communication
interface. This antenna coil together with the chip form a transponder or tag.
The on-chip 128-bit User EEPROM (16 bytes with 8 bits each) can be read and written byte-wise from a base station
(reader). Data is transmitted from the IDIC (uplink) using load modulation. This is achieved by damping the RF field with a
resistive load between the two terminals Coil 1 and Coil 2. The IC receives and decodes serial base station commands
(downlink), which are encoded as 100% amplitude-modulated (OOK) pulse-interval-encoded bit streams.
The Atmel ATA5575M2 is an EEPROM-based circuit. It is optimized for maximum read range. Programming is also possible
but the write range is limited.
The typical animal ID application conforming to ISO11784/85 is read-only and operates at 134.2kHz. The Atmel ATA5575M2
thus has to be locked after programming the animal-specific code.
2. System Block Diagram
Figure 2-1. RFID System Using Atmel ATA5575M2 Tag
Base station
Atmel ATA5575
3. Atmel ATA5575M2 - Functional Blocks
Figure 3-1. Block Diagram
Coil 1
Coil 2
Mode register
Test logic
(136-bit EEPROM)
Input register
HV generator

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4. Analog Front End (AFE)
The AFE includes all circuits which are connected directly to the coil terminals. The AFE generates the IC power supply and
handles bi-directional data communication with the reader. The AFE consists of the following blocks:
Rectifier to generate a DC supply voltage from the AC coil voltage
Clock extractor
Switchable load between Coil 1 and Coil 2 for data transmission from tag to the reader
Field-gap detector for data transmission from the base station to the tag
ESD protection circuitry
4.1 Data Rate Generator
The data rate of the Atmel ATA5575M2 is programmable to operate at RF/50 (FDX-A mode) and RF/32 (FDX-B mode).
4.2 Write Decoder
The write decoder detects the write gaps and verifies the validity of the data stream according to the Atmel® downlink
protocol (pulse-interval encoding).
4.3 HV Generator
This on-chip charge pump circuit generates the high voltage required for programming the EEPROM.
4.4 DC Supply
Power is supplied externally to the IDIC via the two coil connections. The IC rectifies and regulates this RF source and uses
it to generate its supply voltage.
4.5 Power-On Reset (POR)
The power-on reset circuit blocks the voltage supply to the IDIC until an acceptable voltage threshold has been reached.
This, in turn, triggers the default initialization delay sequence. During this configuration period of 98 field clocks, the
ATA5575M2 is initialized with the configuration data stored in EEPROM byte 16.
4.6 Clock Extraction
The clock extraction circuit uses the external RF signal as its internal clock source.
4.7 Controller
The control logic module executes the following functions:
Load mode register with configuration data from EEPROM byte 16 after power-on and during reading
Controls each EEPROM memory read/write access and handles data protection
Handle downlink command decoding, detecting protocol violations and error conditions

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4.8 Mode Register
The mode register maintains a readable shadow copy of the configuration data held in byte 16 of the EEPROM. It is
continually refreshed during read mode and (re-)loaded after every POR event or reset command. Depending on the
version, upon leaving the Atmel® factory site, the configuration data is pre-programmed according to Table 10-1 on page 18
and Table 10-4 on page 20.
4.9 Modulator
The modulator encodes the serialized EEPROM data for transmission to a tag reader or base station. Two types of encoding
are implemented: Differential Biphase and FSK.
4.10 Memory
Figure 4-1. Memory Map
Configuration data
User data
User data
User data
User data
User data
User data
User data
User data
User data
User data
User data
User data
User data
User data
User data
User data
Byte 16
Byte 15
Byte 14
Byte 13
Byte 12
Byte 11
Byte 10
Byte 9
Byte 8
Byte 7
Byte 6
Byte 5
Byte 4
Byte 3
Byte 2
Byte 1
Byte 0
8 bits
Not transmitted
The memory is a 136-bit EEPROM arranged in 17 bytes of 8 bits each. Programming takes place on a byte basis meaning a
complete byte is programmed with a single command.
Byte 16 contains the mode/configuration data which is otherwise not transmitted during regular-read operations.
A special combination of bits in byte 16 (see Table 5-1 on page 5) locks the whole memory. Once locked, the memory
(including byte 16 itself) is not reprogrammable through the RF field again.

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