AT24C04A Datasheet PDF - ATMEL

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AT24C04A
ATMEL

Part Number AT24C04A
Description 2-Wire Serial EEPROM
Page 20 Pages


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Features
Write Protect Pin for Hardware Data Protection
– Utilizes Different Array Protection Compared to the AT24C02/04
Low-voltage and Standard-voltage Operation
– 2.7 (VCC = 2.7V to 5.5V)
– 1.8 (VCC = 1.8V to 5.5V)
Internally Organized 256 x 8 (2K), 512 x 8 (4K)
Two-wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
100 kHz (1.8V) and 400 kHz (2.5V, 2.7V, 5V) Clock Rate
8-byte Page (2K), 16-byte Page (4K) Write Modes
Partial Page Writes Allowed
Self-timed Write Cycle (5 ms Max)
High Reliability
– Endurance: One Million Write Cycles
– Data Retention: 100 Years
Automotive Grade, Extended Temperature and Lead-Free/Halogen-Free Devices
Available
8-lead PDIP, 8-lead JEDEC SOIC, 8-lead MAP, 8-lead TSSOP and 8-ball dBGA2 Packages
Die Sales: Wafer Form, Waffle Pack, and Bumped Wafers.
Two-wire Serial
EEPROM
2K (256 x 8)
4K (512 x 8)
AT24C02A
Description
The AT24C02A/04A provides 2048/4096 bits of serial electrically erasable and program-
mable read-only memory (EEPROM) organized as 256/512 words of 8 bits each. The
device is optimized for use in many industrial and commercial applications where low-
power and low-voltage operation are essential. The AT24C02A/04A is available in
space-saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead MAP and 8-lead TSSOP pack-
ages and is accessed via a two-wire serial interface. In addition, the entire family is
available in 2.7V (2.7V to 5.5V) and 1.8V (1.8V to 5.5V) versions.
AT24C04A
Table 1. Pin Configuration
Pin Name
Function
A0–A2
Address Inputs
SDA
Serial Data
SCL Serial Clock Input
WP Write Protect
NC No-connect
8-lead TSSOP
A0
A1
A2
GND
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
8-lead PDIP
A0
A1
A2
GND
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
8-lead MAP
VCC 8
1 A0
WP 7
2 A1
SCL 6
3 A2
SDA 5
4 GND
Bottom View
8-lead SOIC
A0
A1
A2
GND
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
8-ball dBGA2
VCC 8
WP 7
SCL 6
SDA 5
1 A0
2 A1
3 A2
4 GND
Bottom View
Rev. 0976Q–SEEPR–8/05
1



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Absolute Maximum Ratings*
Operating Temperature........................................−40°C to +85°C
Storage Temperature .........................................−65°C to +150°C
Voltage on Any Pin
with Respect to Ground ........................................ −1.0V to +7.0V
Maximum Operating Voltage .......................................... 6.25V
DC Output Current........................................................ 5.0 mA
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Figure 1. Block Diagram
START
STOP
LOGIC
Pin Description
SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each
EEPROM device and negative edge clock data out of each device.
SERIAL DATA (SDA): The SDA pin is bidirectional for serial data transfer. This pin is
open-drain driven and may be wire-ORed with any number of other open-drain or open
collector devices.
DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1 and A0 pins are device
address inputs that must be hardwired for the AT24C02A. As many as eight 2K devices
may be addressed on a single bus system. (Device addressing is discussed in detail
under Device Addressing, page 8).
2 AT24C02A/04A
0976Q–SEEPR–8/05



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AT24C02A/04A
The AT24C04A uses the A2 and A1 inputs for hardwire addressing, and a total of four
4K devices may be addressed on a single bus system. The A0 pin is a no-connect.
WRITE PROTECT (WP): The AT24C02A/04A have a WP pin that provides hardware
data protection. The WP pin allows normal read/write operations when connected to
ground (GND). When the WP pin is connected to VCC, the write protection feature is
enabled and operates as shown.
Table 2. Write Protect
WP Pin Status
At VCC
At GND
Part of the Array Protected
24C02A
24C04A
Upper Half (1K) Array
Upper Half (2K) Array
Normal Read/Write Operations
Memory Organization AT24C02A, 2K SERIAL EEPROM: The 2K is internally organized with 32 pages of 8
bytes each. Random word addressing requires an 8-bit data word address.
AT24C04A, 4K SERIAL EEPROM: The 4K is internally organized with 32 pages of 16
bytes each. Random word addressing requires a 9-bit data word address.
Table 3. Pin Capacitance(1)
Applicable over recommended operating range from TAI = 25°C, f = 1.0 MHz, VCC = +1.8V
Symbol
Test Condition
Max Units
CI/O
CIN
Note:
Input/Output Capacitance (SDA)
Input Capacitance (A0, A1, A2, SCL)
1. This parameter is characterized and is not 100% tested.
8
6
pF
pF
Conditions
VI/O = 0V
VIN = 0V
0976Q–SEEPR–8/05
3



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Table 4. DC Characteristics
Applicable over recommended operating range from: TAI = 40°C to +85°C, VCC = +1.8V to +5.5V (unless otherwise noted)
Symbol Parameter
Test Condition
Min Typ Max
Units
VCC1
VCC2
VCC3
VCC4
ICC
ICC
ISB1
ISB2
ISB3
ISB4
ILI
ILO
VIL
VIH
VOL2
VOL1
Note:
Supply Voltage
Supply Voltage
Supply Voltage
Supply Voltage
Supply Current VCC = 5.0V
Supply Current VCC = 5.0V
Standby Current VCC = 1.8V
Standby Current VCC = 2.5V
Standby Current VCC = 2.7V
Standby Current VCC = 5.0V
Input Leakage Current
Output Leakage Current
Input Low Level (1)
READ at 100 kHz
WRITE at 100 kHz
VIN = VCC or VSS
VIN = VCC or VSS
VIN = VCC or VSS
VIN = VCC or VSS
VIN = VCC or VSS
VOUT = VCC or VSS
Input High Level (1)
Output Low Level VCC = 3.0V
IOL = 2.1 mA
Output Low Level VCC = 1.8V
IOL = 0.15 mA
1. VIL min and VIH max are reference only and are not tested.
1.8 5.5
2.5 5.5
2.7 5.5
4.5 5.5
0.4 1.0
2.0 3.0
0.6 3.0
1.4 4.0
1.6 4.0
8.0 18.0
0.10 3.0
0.05 3.0
0.6
VCC x 0.7
VCC x 0.3
VCC + 0.5
0.4
0.2
V
V
V
V
mA
mA
µA
µA
µA
µA
µA
µA
V
V
V
V
4 AT24C02A/04A
0976Q–SEEPR–8/05



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