AT-32033 Datasheet PDF - AVAGO

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AT-32033
AVAGO

Part Number AT-32033
Description High Performance NPN Silicon Bipolar Transistor
Page 10 Pages


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AT-32011, AT-32033
Low Current, High Performance NPN
Silicon Bipolar Transistor
Data Sheet
Description
Avago’s AT-32011 and AT-32033 are high performance
NPN bipolar transistors that have been optimized for
maximum ft at low voltage operation, making them ideal
for use in battery powered applications in wireless mar-
kets. The AT-32033 uses the 3 lead SOT‑23, while the AT-
32011 places the same die in the higher performance 4
lead SOT-143. Both packages are industry standard, and
compatible with high volume surface mount assembly
techniques.
The 3.2 micron emitter-to-emitter pitch and reduced
parasitic design of these transistors yields extremely high
performance products that can perform a multiplicity
of tasks. The 20 emitter finger inter­digitated geometry
yields an easy to match to and extremely fast transistor
with moderate power, low noise resistance, and low op-
erating currents.
Optimized performance at 2.7 V makes these devices
ideal for use in 900 MHz, 1.8 GHz, and 2.4 GHz battery
operated systems as an LNA, gain stage, buffer, oscilla­
tor, or active mixer. Typical amplifier designs at 900 MHz
yield 1.2 dB noise figures with 12 dB or more associated
gain at a 2.7 V, 2 mA bias, with noise performance being
relatively insensitive to input match. High gain capabil-
ity at 1 V, 1 mA makes these devices a good fit for 900
MHz pager applications. Voltage breakdowns are high
enough for use at 5 volts.
The AT-3 series bipolar transistors are fabricated using
an optimized version of Avago’s 10 GHz ft, 30 GHz fMAX
Self-Aligned-Transistor (SAT) process. The die are nitride
passivated for surface protection. Excellent device uni-
formity, performance and reliability are produced by the
use of ion-implantation, self-alignment techniques, and
gold metalization in the fabrication of these devices.
Features
High Performance Bipolar Transistor Optimized for
Low Current, Low Voltage Operation
900 MHz Performance:
AT-32011: 1 dB NF, 14 dB GA
AT-32033: 1 dB NF, 12.5 dB GA
Characterized for End-Of-Life Battery Use (2.7 V)
SOT-23 and SOT-143 SMT Plastic Packages
Tape-And-Reel Packaging Option Available
Lead-free
Pin Connections and Package Marking
EMITTER COLLECTOR
320x
BASE EMITTER
SOT-143 (AT-32011)
COLLECTOR
320x
BASE EMITTER
SOT-23 (AT-32033)
Notes:
Top View.
Note:
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"x" is the date code.



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AT-32011, AT-32033 Absolute Maximum Ratings
Symbol
Parameter
Units
VEBO
VCBO
VCEO
IC
PT
Tj
TSTG
Emitter-Base Voltage
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current
Power Dissipation[2, 3]
Junction Temperature
Storage Temperature
V
V
V
mA
mW
°C
°C
Absolute
Maximum[1]
1.5
11
5.5
32
200
150
-65 to 150
Thermal Resistance[2]:
θjc = 550 °C/W
Notes:
1. Operation of this device above any one
of these parameters may cause permanent
damage.
2. Tmounting surface = 25°C.
3. Derate at 1.82 mW/°C for TC > 40°C.
Electrical Specifications, TA = 25°C
AT-32011 AT-32033
Symbol   Parameters and Test Conditions
Units Min. Typ. Max. Min. Typ.
NF
Noise Figure
  VCE = 2.7 V, IC = 2 mA
f = 0.9 GHz
dB
1.0[1] 1.3[1]
1.0[2]
GA
Associated Gain
  VCE = 2.7 V, IC = 2 mA
f = 0.9 GHz
dB 12.5[1] 14[1]
11[2] 12.5[2]
hFE
Forward Current Transfer Ratio
  VCE = 2.7 V, IC = 2 mA
– 70
300 70
ICBO
Collector Cutoff Current
  VCB = 3 V
µA
0.2
IEBO
Emitter Cutoff Current
  VEB = 1 V
µA
1.5
Notes:
1. Test circuit A, Figure 1. Numbers reflect device performance de-embedded from circuit losses. Input loss = 0.3 dB;
output loss = 0.3 dB.
2. Test circuit B, Figure 1. Numbers reflect device performance de-embedded from circuit losses. Input loss = 0.3 dB;
output loss = 0.3 dB.
Max.
1.3[2]
300
0.2
1.5
1000 pF
RF IN
VBB
W = 10 L = 1870
W = 10
CKT A: L = 380
CKT B: L = 380
W = 30
L = 60
TEST CIRCUIT
BOARD MATL = 0.062" FR-4 (ε = 4.8)
VCC
1000 pF
W = 30
L = 60
W = 10 L = 1870
CKT A: 25
CKT B: 5
RF OUT
W = 10
CKT A: L = 105
CKT A: W = 30 L = 50 x 2
CKT B: W = 30 L = 60
CKT B: L = 850
NOT TO SCALE
DIMENSIONS IN MILS
Figure 1. Test Circuit for Noise Figure and Associated Gain.
This circuit is a compromise match between bestAnTo-i3s2e0f1ig1ufrige,1best gain, stability, and a practical synthesizable match.




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Characterization Information, TA = 25°C
Symbol Parameters and Test Conditions
Units
P1dB
Power at 1 dB Gain Compression (opt tuning)
  VCE = 2.7 V, IC = 20 mA
G1dB
Gain at 1 dB Gain Compression (opt tuning)
  VCE = 2.7 V, IC = 20 mA
IP3
Output Third Order Intercept Point (opt tuning)
  VCE = 2.7 V, IC = 20 mA
|S21|E2 Gain in 50 Ω System
  VCE = 2.7 V, IC = 2 mA
f = 0.9 GHz
f = 0.9 GHz
f = 0.9 GHz
f = 0.9 GHz
dBm
dB
dBm
dB
AT-32011
Typ.
13
16.5
24
13
AT-32033
Typ.
13
15
24
11.5
2 25 20
1.5
1
1 mA
2 mA
5 mA
0.5 10 mA
20 mA
00 0.5 1 1.5 2
FREQUENCY (GHz)
2.5
Figure 2. AT-32011 and AT-32033 Minimum Noise Fig-
ure vs. Frequency and Current at Vce = 2.7 V.
AT-32011 fig 2
20
15
10
1 mA
2 mA
5 5 mA
10 mA
20 mA
00 0.5 1.0 1.5 2.0 2.5
FREQUENCY (GHz)
15
10
1 mA
5
2 mA
5 mA
10 mA
20 mA
00 0.5 1.0 1.5 2.0 2.5
FREQUENCY (GHz)
Figure 3. AT-32011 Associated Gain at Optimum Noise
Match vs. Frequency and Current at Vce = 2.7 V.
AT-32011 fig 3
Figure 4. AT-32033 Associated Gain at Optimum Noise
Match vs. Frequency and Current at Vce = 2.7 V.
AT-32011 fig 4
20 20 20
15
10
5
2 mA
0 5 mA
10 mA
20 mA
-50 0.5 1.0 1.5 2.0 2.5
FREQUENCY (GHz)
15
10
5
2 mA
5 mA
10 mA
20 mA
00 0.5 1.0 1.5 2.0 2.5
FREQUENCY (GHz)
15
10
5
2 mA
5 mA
10 mA
20 mA
00 0.5 1.0 1.5 2.0 2.5
FREQUENCY (GHz)
Figure 5. AT-32011 and AT-32033 Power at 1 dB Gain
Compression vs. Frequency and Current at Vce = 2.7 V.
AT-32011 fig 5
Figure 6. AT-32011 1 dB Compressed Gain vs. Frequen-
cy and Current at Vce = 2.7 V.
AT-32011 fig 6
Figure 7. AT-32033 1 dB Compressed Gain vs. Frequen-
cy and Current at Vce = 2.7 V.
AT-32011 fig 7




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AT-32011, AT-32033 Typical Performance
20 20 20
15
10
5
2 mA
0 5 mA
10 mA
20 mA
-50 0.5 1.0 1.5 2.0 2.5
FREQUENCY (GHz)
Figure 8. AT-32011 and AT-32033 Power at 1 dB Gain
Compression vs. Frequency and Current at Vce = 5 V.
AT-32011 fig 8
15 15
10 10
5
2 mA
5 mA
10 mA
20 mA
00 0.5 1.0 1.5 2.0 2.5
FREQUENCY (GHz)
Figure 9. AT-32011 1 dB Compressed Gain vs. Frequen-
cy and Current at Vce = 5 V.
AT-32011 fig 9
5
2 mA
5 mA
10 mA
20 mA
00 0.5 1.0 1.5 2.0 2.5
FREQUENCY (GHz)
Figure 10. AT-32033 1 dB Compressed Gain vs. Fre-
quency and Current at Vce = 5 V.
AT-32011 fig 10
10
2 mA
5 mA
7.5
5
2.5
0
-2.5
-50 0.5 1.0 1.5 2.0 2.5
FREQUENCY (GHz)
Figure 11. AT-32011 and AT-32033 Power at 1 dB Gain
Compression vs. Frequency and Current at Vce = 1 V.
AT-32011 fig 11
25 2.5
20 20
15 15
10 10
5
2 mA
5 mA
00 0.5 1.0 1.5 2.0 2.5
FREQUENCY (GHz)
Figure 12. AT-32011 1 dB Compressed Gain vs. Fre-
quency and Current at Vce = 1 V.
AT-32011 fig 12
25 2.5
5
2 mA
5 mA
00 0.5 1.0 1.5 2.0 2.5
FREQUENCY (GHz)
Figure 13. AT-32033 1 dB Compressed Gain vs. Fre-
quency and Current at Vce = 1 V.
AT-32011 fig 13
25
20 2.0
Ga
15 1.5
10
NF
5
1.0
0.5
0-50 0
50 1000
TEMPERATURE (°C)
Figure 14. AT-32011 Noise Figure and Associated Gain
at Vce = 2.7 V, Ic = 2 mA vs. Temperature in Test Circuit,
Figure 1. (Circuit Losses De-embedded).
AT-31011 fig 14
20 2.0
15 1.5
Ga
10 1.0
NF
5 0.5
0-50 0
50 1000
TEMPERATURE (°C)
Figure 15. AT-32033 Noise Figure and Associated Gain
at Vce = 2.7 V, Ic = 2 mA vs. Temperature in Test Circuit,
Figure 1. (Circuit Losses De-embedded).
AT-32011 fig 15
20
15
10
2 mA
5 5 mA
10 mA
20 mA
00 0.5 1.0 1.5 2.0 2.5
FREQUENCY (MHz)
Figure 16. AT-32011 and AT-32033 Third Order In-
tercept vs. Frequency and Bias at Vce = 2.7 V, with
Optimal Tuning.
AT-32011 fig 16




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