I. PIN DESCRIPTION
Each symbol at I/ O column in the following table means,
PWR : Power（VDD） or VSS, Ai : Analog input, Ao : Analog output,
Di : Digital input, Di_pu : Digital input with pulled-up resistor,
Do : Digital output, Do_od : Digital output (Open drain), Dio_od : Digital input/output (Open drain)
Pin# Pin Name
1 TEST1 Input pin for AKM test. Connect it to DVSS for Normal operation.
2 TEST2 Input pin for AKM test. Connect it to DVSS for Normal operation.
3 TEST3 Input pin for AKM test. Connect it to DVSS for Normal operation.
4 DVDD Power supply for Digital circuit.
5 DVSS Ground for Digital circuit.
Alarms such as Optical output decline (OPTALM), Excessive LD
current (CURRALM), Exceptional temperature (TEMPALM) and
Irregular external signals (EXTALM1 and EXTALM2) can be
selected by EEPROM / Register setting as target alarms available on
When any of the selected alarms (ALM) is detected, TXFAULT-pin
6 TXFAULT becomes ”High-Z“ output, and it becomes “H“ level with a pulled-up Do_od to Pulled-up
resistor connection. This pin is open-drain type and should be
connected to DVDD via a 4.7k ~ 10kΩ resistor.
With RE_SFP_SET＝“0“ (SFP support mode setting), TXFAULT-
pin output is held at “H“ level when any of the selected alarms is
detected till the shutdown request is released by “H“ to “L“ transition
Serial data input / output pin for Digital interface.
7 SDA This pin is open-drain type and should be connected to DVDD via a Dio_od to Pulled-up
4.7k ~ 10kΩ resistor.
8 SCL Serial clock input for Digital interface
be left open
Burst signal input. It is active during “H“ input period (valid data
period). When this pin is not used, connect it to DVSS.
be left open
When this pin is at “H“ input, Bias current DAC (I-DAC2) output
and Modulation current DAC (I-DAC1 or V-DAC3) output are
disabled. Refer to Table 7-1 and Table 7-2.
At RE_SFP_SET＝“0“ (SFP support mode setting), a logical sum of
TXFAULT output and TXDIS-pin input become a disable request.
be left open
At RE_SFP_SET＝“1“, TXDIS-pin input becomes a disable request.
When this pin is externally pulled-up, use a higher than 4.7kΩ
resistor. When this pin is not used, connect it to DVSS.
11 AVDD Power supply for Analog circuit.
12 AVSS Ground for Analog circuit.
Monitoring PD (Photo Diode) voltage input.
The detected monitor PD current is I to V converted by external
resistor and capacitor. Please adjust the cut-off frequency of an LPF
to be within 5k ~ 10kHz which is composed of external resistor (Rpd)
and capacitor (Cpd).
When this pin is not used, it is recommended to connect it to AVSS.
Bias current monitor. A current multiplied by 0.012 [Typ.] of the
I-DAC2 output current is sourced from this pin. When to convert the
current to a voltage by an external resistor, select the resistor value
such that BIASMON-pin voltage≦1.3 V.
15 VSSBI Ground for I-DAC2.