ADM1166 Datasheet PDF - Analog Devices

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ADM1166
Analog Devices

Part Number ADM1166
Description Super Sequencer
Page 30 Pages


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Data Sheet
Super Sequencer with Margining Control
and Nonvolatile Fault Recording
ADM1166
FEATURES
Complete supervisory and sequencing solution for up to
10 supplies
16 event deep black box nonvolatile fault recording
10 supply fault detectors enable supervision of supplies to
<0.5% accuracy at all voltages at 25°C
<1.0% accuracy across all voltages and temperatures
5 selectable input attenuators allow supervision of supplies to
14.4 V on VH and 6 V on VP1 to VP4 (VPx)
5 dual-function inputs, VX1 to VX5 (VXx)
High impedance input to supply fault detector with
thresholds between 0.573 V and 1.375 V
General-purpose logic input
10 programmable driver outputs, PDO1 to PDO10 (PDOx)
Open-collector with external pull-up
Push/pull output, driven to VDDCAP or VPx
Open collector with weak pull-up to VDDCAP or VPx
Internally charge-pumped high drive for use with external
N-FET (PDO1 to PDO6 only)
SE implements state machine control of PDO outputs
State changes conditional on input events
Enables complex control of boards
Power-up and power-down sequence control
Fault event handling
Interrupt generation on warnings
Watchdog function can be integrated in SE
Program software control of sequencing through SMBus
Complete voltage-margining solution for 6 voltage rails
6 voltage output 8-bit DACs (0.300 V to 1.551 V) allow voltage
adjustment via dc-to-dc converter trim/feedback node
12-bit ADC for readback of all supervised voltages
2 auxiliary (single-ended) ADC inputs
Reference input (REFIN) has 2 input options
Driven directly from 2.048 V (±0.25%) REFOUT pin
More accurate external reference for improved ADC
performance
Device powered by the highest of VPx, VH for improved
redundancy
User EEPROM: 256 bytes
Industry-standard 2-wire bus interface (SMBus)
Guaranteed PDO low with VH, VPx = 1.2 V
Available in 40-lead, 6 mm × 6 mm LFCSP and
48-lead, 7 mm × 7 mm TQFP packages
FUNCTIONAL BLOCK DIAGRAM
AUX1 AUX2
REFIN REFOUT REFGND SDA SCL A1 A0
ADM1166
VREF
SMBus
INTERFACE
VX1
VX2
VX3
VX4
VX5
VP1
VP2
VP3
VP4
VH
AGND
12-BIT
SAR ADC
EEPROM
CLOSED-LOOP
MARGINING SYSTEM
FAULT RECORDING
DUAL-
FUNCTION
INPUTS
(LOGIC INPUTS
OR
SFDs)
PROGRAMMABLE
RESET
GENERATORS
(SFDs)
SEQUENCING
ENGINE
CONFIGURABLE
OUTPUT
DRIVERS
(HV CAPABLE OF
DRIVING GATES
OF N-FET)
CONFIGURABLE
OUTPUT
DRIVERS
(LV CAPABLE
OF DRIVING
LOGIC SIGNALS)
VOUT VOUT VOUT VOUT VOUT VOUT
DAC DAC DAC DAC DAC DAC
VDD
ARBITRATOR
PDO1
PDO2
PDO3
PDO4
PDO5
PDO6
PDO7
PDO8
PDO9
PDO10
PDOGND
VDDCA P
DAC1 DAC2 DAC3 DAC4 DAC5 DAC6
Figure 1.
APPLICATIONS
VCCP GND
Central office systems
Servers/routers
Multivoltage system line cards
DSP/FPGA supply sequencing
In-circuit testing of margined supplies
GENERAL DESCRIPTION
The ADM1166 Super Sequencer® is a configurable supervisory/
sequencing device that offers a single-chip solution for supply
monitoring and sequencing in multiple-supply systems. In addition
to these functions, the ADM1166 integrates a 12-bit ADC and
six 8-bit voltage output DACs. These circuits can be used to
implement a closed-loop margining system that enables supply
adjustment by altering either the feedback node or reference of
a dc-to-dc converter using the DAC outputs.
Supply margining can be performed with a minimum of external
components. The margining loop can be used for in-circuit testing
of a board during production (for example, to verify board func-
tionality at −5% of nominal supplies), or it can be used dynamically
to accurately control the output voltage of a dc-to-dc converter.
For more information about the ADM1166 register map, refer
to the AN-698 Application Note.
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2010–2015 Analog Devices, Inc. All rights reserved.
Technical Support
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ADM1166* Product Page Quick Links
Last Content Update: 11/01/2016
Comparable Parts
View a parametric search of comparable parts
Evaluation Kits
• ADM1166 Evaluation Board
Documentation
Application Notes
• AN-0973: Erasing and Programming the Sequencing
Engine EEPROM
• AN-0975: Automatic Generation of State Diagrams for the
ADM1062 to ADM1069 Using Graphviz
• AN-0997: Ping-Pong Configuration Guide for ADM1062 to
ADM1069 Devices
• AN-1001: Checksum Calculations
• AN-1009: Block Erasing, Reading and Writing to the
ADM106x EEPROM
• AN-1086: Using an ADM106x in a Hot Swap Application
• AN-698: Configuration Registers of ADM1062/ADM1063/
ADM1064/ADM1065/ADM1066/ADM1067/ADM1166
• AN-722: Watchdog Detection Using the ADM106x
• AN-723: Interrupt Generation Using the ADM106x
• AN-780: Monitoring Negative Voltages with the ADM1062
to ADM1069 Super Sequencers
• AN-781: Monitoring Additional Supplies with the
ADM1062-ADM1069 Super Sequencers™
• AN-782: Monitoring High Voltages with the ADM1062-
ADM1069 Super Sequencers™
• AN-897: ADC Readback Code
Data Sheet
• ADM1166: Super Sequencer with Margining Control, and
Non-Volatile Fault Recording
User Guides
• SuperSequencer Documentation
• UG-404: USB-SDP-CABLEZ Serial Interface Board
Software and Systems Requirements
• ADMxxxx Common Run-Time
• SuperSequencer Software
Design Resources
• ADM1166 Material Declaration
• PCN-PDN Information
• Quality And Reliability
• Symbols and Footprints
Discussions
View all ADM1166 EngineerZone Discussions
Sample and Buy
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Technical Support
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* This page was dynamically generated by Analog Devices, Inc. and inserted into this data sheet. Note: Dynamic changes to
the content on this page does not constitute a change to the revision number of the product data sheet. This content may be
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ADM1166
TABLE OF CONTENTS
Features .............................................................................................. 1
Functional Block Diagram .............................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Detailed Block Diagram .................................................................. 3
Specifications..................................................................................... 4
Absolute Maximum Ratings............................................................ 7
Thermal Resistance ...................................................................... 7
ESD Caution.................................................................................. 7
Pin Configurations and Function Descriptions ........................... 8
Typical Performance Characteristics ........................................... 10
Powering the ADM1166 ................................................................ 13
Slew Rate Consideration............................................................ 13
Inputs................................................................................................ 14
Supply Supervision..................................................................... 14
Programming the Supply Fault Detectors............................... 14
Input Comparator Hysteresis.................................................... 14
Input Glitch Filtering ................................................................. 15
VP1 Glitch Filtering ................................................................... 15
Supply Supervision with VXx Inputs....................................... 15
VXx Pins as Digital Inputs ........................................................ 16
Outputs ............................................................................................ 17
Supply Sequencing Through Configurable Output Drivers.......17
Default Output Configuration.................................................. 17
Sequencing Engine ......................................................................... 18
Overview...................................................................................... 18
Warnings...................................................................................... 18
REVISION HISTORY
3/15—Rev. 0 to Rev. A Changed
Round-Robin Circuit to
ADC Round-Robin ....................................................... Throughout
Changes to Figure 3, Figure 4, and Table 4 ................................... 8
Added Slew Rate Consideration Section ..................................... 13
Added VP1 Glitch Filtering Section............................................. 15
Changes to Ordering Guide .......................................................... 33
12/10—Revision 0: Initial Version
Data Sheet
SMBus Jump (Unconditional Jump)........................................ 18
Sequencing Engine Application Example ............................... 19
Fault and Status Reporting........................................................ 20
Nonvolatile Black Box Fault Recording................................... 21
Black Box Writes with No External Supply ............................ 21
Voltage Readback............................................................................ 22
Supply Supervision with the ADC ........................................... 22
Supply Margining ........................................................................... 23
Overview ..................................................................................... 23
Open-Loop Supply Margining ................................................. 23
Closed-Loop Supply Margining ............................................... 23
Writing to the DACs .................................................................. 24
Choosing the Size of the Attenuation Resistor....................... 24
DAC Limiting and Other Safety Features ............................... 24
Applications Diagram .................................................................... 25
Communicating with the ADM1166........................................... 26
Configuration Download at Power-Up................................... 26
Updating the Configuration ..................................................... 26
Updating the Sequencing Engine............................................. 27
Internal Registers........................................................................ 27
EEPROM ..................................................................................... 27
Serial Bus Interface..................................................................... 27
SMBus Protocols for RAM and EEPROM.............................. 29
Write Operations ........................................................................ 30
Read Operations......................................................................... 31
Outline Dimensions ....................................................................... 33
Ordering Guide .......................................................................... 33
Rev. A | Page 2 of 33



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Data Sheet
ADM1166
The device also provides up to 10 programmable inputs for
monitoring undervoltage faults, overvoltage faults, or out-of-
window faults on up to 10 supplies. In addition, 10 programmable
outputs can be used as logic enables. Six of these programmable
outputs can also provide up to a 12 V output for driving the gate
of an N-FET that can be placed in the path of a supply.
The logical core of the device is a sequencing engine (SE). This
state-machine-based construction provides up to 63 different
states. This design enables very flexible sequencing of the outputs,
based on the condition of the inputs.
A block of nonvolatile EEPROM is available that can be used to
store user-defined information and may also be used to hold a
number of fault records that are written by the sequencing engine
defined by the user when a particular fault or sequence occurs.
The device is controlled via configuration data that can be
programmed into an EEPROM. The entire configuration can
be programmed using an intuitive GUI-based software package
provided by Analog Devices, Inc.
DETAILED BLOCK DIAGRAM
REFIN REFOUT
AUX2 AUX1
REFGND SDA SCL A1 A0
VX1
VX2
VX3
VX4
VX5
VP1
VP2
VP3
VP4
VH
AGND
VDDCAP
SELECTABLE
ATTENUATOR
SELECTABLE
ATTENUATOR
VDD
ARBITRATOR
ADM1166
VREF
12-BIT
SAR ADC
GPI SIGNAL
CONDITIONING
SFD
SMBus
INTERFACE
DEVICE
CONTROLLER
FAULT RECORDING
OSC
EEPROM
CONFIGURABLE
OUTPUT DRIVER
(HV)
GPI SIGNAL
CONDITIONING
SFD
SEQUENCING
ENGINE
CONFIGURABLE
OUTPUT DRIVER
(HV)
PDO1
PDO2
PDO3
PDO4
PDO5
PDO6
SFD
SFD
REG 5.25V
CHARGE PUMP
VOUT
DAC
CONFIGURABLE
OUTPUT DRIVER
(LV)
CONFIGURABLE
OUTPUT DRIVER
(LV)
VOUT
DAC
PDO7
PDO8
PDO9
PDO10
PDOGND
GND
VCCP
DAC1 DAC2 DAC3 DAC4 DAC5 DAC6
Figure 2.
Rev. A | Page 3 of 33



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