AD6312 Datasheet PDF - Anachip

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AD6312
Anachip

Part Number AD6312
Description 1/4- to 1/11 Duty VFD Controller/Driver
Page 13 Pages


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1/4- to 1/11 Duty VFD Controller/Driver
AD6312
Features
˙4-pin serial interface
˙Key scanning (6× 4 matrices)
˙Programming display modes (11-segments & 11-
digits to 16-segments & 6-digits)
˙Programming dimming step
˙High-voltage output (VDD-35V max).
˙4 channels LED ports.
˙4-pin General-purpose input port
˙Built-in oscillator
˙No external resistor necessary for driver outputs
General Description
The AD6312 is a VFD (Vacuum Fluorescent
Display) controller/driver that is driven on a 1/4- to
1/11 duty factor (include key scan). It consists of 5
segment output lines, 6 segment/key scan output
lines, 6 grid output lines, 5 segment/grid output
drive lines, a display memory, a control circuit, and
a key scan circuit. Serial data is input to the
AD6312 through a four-line serial interface.
Pin Assignments
Grid4
Grid3
Grid2
Grid1
VDD
LED4
LED3
LED2
LED1
VSS
OSC
34
35
36
37
38
39
40
41
42
43
44
22 Seg8
21 Seg7
20 Seg6 / KS6
19 Seg5 / KS5
18 Seg4 / KS4
17 Seg3 / KS3
16 Seg2 / KS2
15 Seg1 / KS1
14 VDD
13 Key4
12 Key3
Use all power pins.
This datasheet contains new product information. Anachip Corp. reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of
this product. No rights under any patent accompany the sale of the product.
Rev. A4 Dec 29, 2003
1/13



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1/4- to 1/11 Duty VFD Controller/Driver
AD6312
Pin Descriptions
Symbol
DIN
DOUT
STB
CLK
OSC
Seg7 to Seg11
Seg1/KS1 to
Seg6/KS6
Grid1 to Grid6
Seg12/Grid11 to
Seg16/Grid7
LED1 to LED4
KEY1 to KEY4
VDD
VSS
VEE
SW1 to SW4
Name
Data input
Data output
No.
6
5
Strobe
9
Clock input
8
Oscillator pin
44
High-voltage output (Segment) 21 to 25
High-voltage output
15 to 20
High-voltage output (Grid)
High-voltage output (Segment/grid)
LED output
32 to 37
26,
28 to 31
39to 42
Key data input
10 to 13
Logic power
Logic ground
Pull-down level
Switch input
14, 38
7, 43
27
1 to 4
Description
Input serial data at rising edge of shift clock,
starting from the low order bit.
Output serial data at the falling edge of the shift
clock, starting from low order bit. This is N-ch
open-drain output pin.
Initializes serial interface at the rising or falling
edge of the AD6312. It then waits for reception of
a command. Data input after STB falling is
processed as a command. While command data
is processed, current processing is stopped, and
the serial interface is initialized. While STB is
high, CLK is ignored.
Reads serial data at the rising edge, and outputs
data at the falling edge.
Connect resistor in between this pin and Vss to
set up the oscillation frequency.
Segment output pins
Multi-function pins, Segment output pins (Dual
function as key scan source)
Grid output pins
These pins are selectable for segment or grid
driving.
CMOS output
Data input to these pins is latched at the end of
the display cycle.
Logic power supply
Connect this pin to system GND.
Driver power supply
These pins constitute a 4-bit general-purpose
input port.
Ordering Information
AD6312 X X X
Package
Q: QFP-44L
L: LQFP-44L
Lead
Blank: Normal
F: Lead Free
Packing
Blank : Tray
Anachip Corp.
www.anachip.com.tw
2/13
Rev. A4 Dec 29, 2003



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1/4- to 1/11 Duty VFD Controller/Driver
Block Diagram
AD6312
DIN
DOUT
CLK
Serial
I/F
STB
VDD
R
OSC
KEY1
to
KEy4
SW1
to
SW4
4
4
4-bit
latch
Command
decoder
Dimming
circuit
6
Display memory
16 bits×
11 Words
Timing generator
key scan
16 11
5
5
5
Key data memory
(4× 6)
5
4-bit latch
11 6
LED1 LED4
Key data memory (4x6)
VDD Vss VEE
(+5V) (0V) (-30V)
Seg1/KS1
Seg6/KS6
Seg7
Seg11
Seg12/Grid11
Seg16/Grid7
Grid1
Grid6
Anachip Corp.
www.anachip.com.tw
3/13
Rev. A4 Dec 29, 2003



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1/4- to 1/11 Duty VFD Controller/Driver
AD6312
Absolute Maximum Ratings (TA=25oC,VSS=0V )
Parameter
Logic Supply Voltage
Driver Supply Voltage
Logic Input Voltage
VFD Driver Output Voltage
LED Driver Output Current
VFD Driver Output Current
Operating Ambient Temperature
Storage Temperature
Symbol
VDD
VEE
VI1
VO2
IO1
IO2
TOPT
TSTG
Rating
-0.5 to +7.0
VDD +0.5 to VDD -40
-0.5 to VDD +0.5
VEE-0.5 to VDD +0.5
+15
-40 (grid)
-15 (segment)
-25 to +85
-50 to +125
Unit
V
V
V
V
mA
mA
oC
oC
Operating Conditions (TA=0 to +70 oC,VSS=0V)
Parameter
Logic Supply Voltage
High-Level Input Voltage
Low-Level Input Voltage
Driver Supply Voltage
Symbol
VDD
VIH
VIL
VEE
Conditions
Min.
4.5
0.7·VDD
0
0
Typ.
5
Max.
5.5
VDD
0.3·VDD
VDD-35
Unit
V
V
V
V
DC Characteristics (TA=0 to 70 oC, VDD=4.5 to 5.5V, VSS=0V, VEE=VDD-35V)
Parameter
High-Level Output Voltage
Low-Level Output Voltage
Low-Level Output Voltage
High-Level Output Current
High-Level Output Current
Driver Leakage Current
Output Pull-Down Resistor
High-Level Input Voltage
Low-Level Input Voltage
Symbol
VOH1
VOL1
VOL2
IOH21
IOH22
IOLEAK
RL
VIH
VIL
Conditions
LED1-LED4, IOH1=-1mA
LED1-LED4, IOL1=12mA
DOUT, IOL2=2mA
VO=VDD-2V, Seg1 to Seg11
VO=VDD-2V, Grid 1 to Grid6
Seg12/Grid11 to Seg16/Grid7
VO=VDD-35V, driver off
Driver output
Min.
0.9VDD
-3
-15
50
0.7VDD
Typ.
100
Max.
1
0.4
-10
150
0.3VDD
Unit
V
V
V
mA
mA
μA
kΩ
V
V
AC Characteristics (Ta=0 to +70 oC,VDD=4.5 to 5.5 V, VEE=-30V)
Parameter
Oscillation Frequency
Maximum Clock Frequency
Clock Pulse Width
Strobe Pulse Width
Data Setup Time
Data Hold Time
Clock-Strobe Time
Wait Time
Note : Refer to page 8.
Symbol
fOSC
fmax.
PWCLK
PWSTB
tSETUP
tHOLD
tCLK-STB
tWAIT
Conditions
R=51 kΩ
Duty=50%
CLK↑→STB
CLK↑→CLK(Note)
Min.
350
500
1
100
100
1
1
Typ.
500
Max.
650
1
Unit
KHZ
MHZ
ns
µs
ns
ns
µs
µs
Anachip Corp.
www.anachip.com.tw
4/13
Rev. A4 Dec 29, 2003



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