1/8- to 1/16 Duty VFD Controller/Driver
Grid1 to Grid8
LED1 to LED5
KEY1 to KEY4
SW1 to SW4
High-voltage output (Grid)
High-voltage output (Segment/grid)
Key data input
15 to 26
Input serial data at rising edge of shift clock,
starting from the low order bit.
Output serial data at the falling edge of the shift
clock, starting from low order bit. This is N-ch
open-drain output pin.
Initializes serial interface at the rising or falling
edge of the AD6311. It then waits for reception of a
command. Data input after STB falling is
processed as a command. While command data is
processed, current processing is stopped, and the
serial interface is initialized. While STB is high,
CLK is ignored.
Reads serial data at the rising edge, and outputs
data at the falling edge.
Connect resistor in between this pin and Vdd to set
up the oscillation frequency.
Multi-function pins, Segment output pins (Dual
function as key scan source)
37 to 44 Grid output pins
27 to 32 These pins are selectable for segment or grid
35, 36 driving.
46 to 50 CMOS output
10 to 13
Data input to these pins is latched at the end of the
14, 33, 45 Logic power supply
51 Connect this pin to system GND.
34 Driver power supply
1 to 4
These pins constitute a 4-bit general-purpose input
7 No connection
AD6311X X X
F: Lead Free
Blank : Tray
Rev. A5 Dec 29, 2003