AD6311 Datasheet PDF - Anachip

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AD6311
Anachip

Part Number AD6311
Description 1/8- to 1/16 Duty VFD Controller/Driver
Page 11 Pages


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1/8- to 1/16 Duty VFD Controller/Driver
AD6311
Features
- 4-pin serial interface
- Key scanning (12x4 matrices)
- Programming display modes (16-digit & 12-
segment to 8-digit & 20-segment)
- Programming dimming step
- High-voltage output (VDD-35V max)
- 5 channels LED ports
- 4-pin general-purpose input port
- Built-in oscillator
- No external resistor necessary for driver outputs
Pin Assignments
General Description
The AD6311 is a VFD (Vacuum Fluorescent
Display) controller/driver that is driven on a 1/8- to
1/16 duty factor (include key scan). It consists of 12
segment/key scan output lines, 8 grid output lines,
8 segment/grid output drive lines, a display memory,
a control circuit, and a key scan circuit. Serial data
is input to the AD6311 through a four-line serial
interface.
Grid5
Grid4
Grid3
Grid2
Grid1
VDD
LED5
LED4
LED3
LED2
LED1
VSS
OSC
40
41
42
43
44
45
46
47
48
49
50
51
52
26 Seg12 / KS12
25 Seg11 / KS11
24 Seg10 / KS10
23 Seg9 / KS9
22 Seg8 / KS8
21 Seg7 / KS7
20 Seg6 / KS6
19 Seg5 / KS5
18 Seg4 / KS4
17 Seg3 / KS3
16 Seg2 / KS2
15 Seg1 / KS1
14 VDD
Use all the power pins.
This datasheet contains new product information. Anachip Corp. reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of
this product. No rights under any patent accompany the sale of the product.
Rev. A5 Dec 29, 2003
1/11



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1/8- to 1/16 Duty VFD Controller/Driver
AD6311
Pin Descriptions
Symbol
DIN
DOUT
STB
CLK
OSC
Seg1/KS1 to
Seg12/KS12
Grid1 to Grid8
Seg13/Grid16 to
Seg20/Grid9
LED1 to LED5
KEY1 to KEY4
VDD
VSS
VEE
SW1 to SW4
NC
Name
Data input
Data output
Strobe
Clock input
Oscillator pin
High-voltage output
High-voltage output (Grid)
High-voltage output (Segment/grid)
LED output
Key data input
Logic power
Logic ground
Pull-down level
Switch input
NC
No. Description
6
5
9
8
52
15 to 26
Input serial data at rising edge of shift clock,
starting from the low order bit.
Output serial data at the falling edge of the shift
clock, starting from low order bit. This is N-ch
open-drain output pin.
Initializes serial interface at the rising or falling
edge of the AD6311. It then waits for reception of a
command. Data input after STB falling is
processed as a command. While command data is
processed, current processing is stopped, and the
serial interface is initialized. While STB is high,
CLK is ignored.
Reads serial data at the rising edge, and outputs
data at the falling edge.
Connect resistor in between this pin and Vdd to set
up the oscillation frequency.
Multi-function pins, Segment output pins (Dual
function as key scan source)
37 to 44 Grid output pins
27 to 32 These pins are selectable for segment or grid
35, 36 driving.
46 to 50 CMOS output
10 to 13
Data input to these pins is latched at the end of the
display cycle.
14, 33, 45 Logic power supply
51 Connect this pin to system GND.
34 Driver power supply
1 to 4
These pins constitute a 4-bit general-purpose input
port.
7 No connection
Ordering Information
AD6311X X X
Package
Q: QFP-52L
Lead
Blank: Normal
F: Lead Free
Packing
Blank : Tray
Anachip Corp.
www.anachip.com.tw
2/11
Rev. A5 Dec 29, 2003



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1/8- to 1/16 Duty VFD Controller/Driver
Block Diagram
DIN
DOUT
CLK
Serial
I/F
STB
VDD
R
OSC
KEY1
to
KEy4
SW1
to
SW4
4
4
4-bit
latch
Command
decoder
Dimming
circuit
Display memory
20 bitX16Words
Timing generator
key scan
Key data memory
(4X2)
5-bit latch
LED1 LED5
20 12
8
8
8
16
8
VDD Vss VEE
(+5V) (0V) (-30V)
AD6311
Seg1
Seg12
Seg13/Grid16
Seg20/Grid9
Grid1
Grid8
Anachip Corp.
www.anachip.com.tw
3/11
Rev. A5 Dec 29, 2003



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1/8- to 1/16 Duty VFD Controller/Driver
AD6311
Absolute Maximum Ratings (TA=25,VSS=0V )
Parameter
Logic supply voltage
Driver supply voltage
Logic input voltage
VFD driver output voltage
LED driver output current
VFD driver output current
Operating ambient temperature
Storage temperature
Symbol
VDD
VEE
VI1
VO2
IO1
IO2
TOPT
TSTG
Rating
-0.5 to +7.0
VDD +0.5 to VDD -40
-0.5 to VDD +0.5
VEE-0.5 to VDD +0.5
+15
-40(grid) –15 (segment)
-25 to +85
-50 to +125
Unit
V
V
V
V
mA
mA
Operating Conditions (TA=0 to +70,VSS=0V)
Parameter
Logic supply voltage
High-level input voltage
Low-level input voltage
Driver supply voltage
Symbol
VDD
VIH
VIL
VEE
Conditions
Min.
4.5
0.7·VDD
0
0
Typ.
5
Max.
5.5
VDD
0.3xVDD
VDD-35
Unit
V
V
V
V
DC Characteristics (Ta=0 to 70, VDD=4.5 to 5.5V, VSS=0V, VEE=VDD-35V)
Parameter
High-level output voltage
Low-level output voltage
Low-level output voltage
High-level output current
High-level output current
Driver leakage current
Output pull-down resistor
High-level input voltage
Low-level input voltage
Symbol
VOH1
VOL1
VOL2
IOH21
IOH22
IOLEAK
RL
VIH
VIL
Conditions
LED1-LED5,IOH1=-1mA
LED1-LED5,IOL1=12mA
DOUT,IOL2=2mA
VO=VDD-2V,Seg1 to Seg12
VO=VDD-2V,Grid 1 to Grid8,
Seg13/Grid16 to Seg20/Grid9
VO=VDD-35V, driver off
Driver output
Min.
0.9VDD
-3
-15
50
0.7VDD
Typ.
100
Max.
1
0.4
-10
150
0.3VDD
Unit
V
V
V
mA
mA
μA
kΩ
V
V
AC Characteristics (Ta=0 to +70,VDD=4.5 to 5.5 V)
Parameter
Oscillation frequency
Maximum clock frequency
Clock pulse width
Strobe pulse width
Data setup time
Data hold time
Clock-strobe time
Wait time
Note: Refer to page 8.
Symbol
fOSC
fmax.
PWCLK
PWSTB
tSETUP
tHOLD
tCLK-STB
tWAIT
Conditions
R=51 kΩ
Duty=50%
CLK↑→STB
CLK↑→CLk(Note)
Min.
350
500
1
100
100
1
1
Typ.
500
Max.
650
1
Unit
KHZ
MHZ
ns
µs
ns
ns
µs
µs
Anachip Corp.
www.anachip.com.tw
4/11
Rev. A5 Dec 29, 2003



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AD6311 pdf
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