AD5762R Datasheet PDF - Analog Devices


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AD5762R
Analog Devices

Part Number AD5762R
Description Bipolar Voltage Output DACs Preliminary
Page 30 Pages

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Preliminary Technical Data
Complete Dual, 16-Bit, High Accuracy,
Serial Input, Bipolar Voltage Output DACs
AD5762R
FEATURES
Complete dual, 16-bit digital-to-analog
converters (DACs)
Programmable output range: ±10 V, ±10.2564 V,
or ±10.5263 V
±1 LSB max INL error, ±1 LSB max DNL error
Low noise: 60 nV/√Hz
Settling time: 10 µs max
Integrated reference buffers
Internal reference: 10 ppm/°C
On-chip die temperature sensor
Output control during power-up/brownout
Programmable short-circuit protection
Simultaneous updating via LDAC
Asynchronous CLR to zero code
Digital offset and gain adjust
Logic output control pins
DSP-/microcontroller-compatible serial interface
Temperature range: −40°C to +85°C
iCMOS™ process technology1
APPLICATIONS
Industrial automation
Open-/closed-loop servo control
Process control
Data acquisition systems
Automatic test equipment
Automotive test and measurement
High accuracy instrumentation
GENERAL DESCRIPTION
The AD5762R is a dual, 16-bit, serial input, bipolar voltage
output digital-to-analog converter that operates from supply
voltages of ±11.4 V up to ±16.5 V. Nominal full-scale output
range is ±10 V. The AD5762R provides integrated output
amplifiers, reference buffers and proprietary power-up/power-
down control circuitry. The parts also feature a digital I/O port,
which is programmed via the serial interface and an analog
temperature sensor. The part incorporates digital offset and
gain adjust registers per channel.
The AD5762R is a high performance converter that offers
guaranteed monotonicity, integral nonlinearity (INL) of ±1 LSB,
low noise, and 10 µs settling time. The AD5762R includes an
on-chip 5 V reference with a reference tempco of 10 ppm/°C
maximum. During power-up (when the supply voltages are
changing), VOUT is clamped to 0 V via a low impedance path.
The AD5762R uses a serial interface that operates at clock rates
of up to 30 MHz and is compatible with DSP and
microcontroller interface standards. Double buffering allows
the simultaneous updating of all DACs. The input coding is
programmable to either twos complement or offset binary
formats. The asynchronous clear function clears all DAC
registers to either bipolar zero or zero scale depending on the
coding used. The AD5762R is ideal for both closed-loop servo
control and open-loop control applications. The AD5762R is
available in a 32-lead TQFP, and offers guaranteed
specifications over the −40°C to +85°C industrial temperature
range. See Figure 1, the functional block diagram.
1 For analog systems designers within industrial/instrumentation equipment
OEMs who need high performance ICs at higher voltage levels, iCMOS is a
technology platform that enables the development of analog ICs capable of
30 V and operating at ±15 V supplies while allowing dramatic reductions in
power consumption and package size, and increased AC and DC
performance.
Rev. PrA
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2007 Analog Devices, Inc. All rights reserved.



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AD5762R
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Functional Block Diagram .............................................................. 3
Specifications..................................................................................... 4
AC Performance Characteristic...................................................... 6
Timing Characteristics..................................................................... 7
Absolute Maximum Ratings.......................................................... 10
ESD Caution................................................................................ 10
Pin Configuration and Function Descriptions........................... 11
Terminology .................................................................................... 13
Typical Performance Characteristics ........................................... 15
Theory of Operation ...................................................................... 21
DAC Architecture....................................................................... 21
Reference Buffers........................................................................ 21
Serial Interface ............................................................................ 21
Simultaneous Updating via LDAC........................................... 22
Transfer Function ....................................................................... 23
Asynchronous Clear (CLR)....................................................... 23
Function Register ....................................................................... 24
REVISION HISTORY
Preliminary Revision PrA December 10, 2007
Preliminary Technical Data
Data Register............................................................................... 25
Coarse Gain Register ................................................................. 25
Fine Gain Register...................................................................... 25
Offset Register ............................................................................ 25
Offset and Gain Adjustment Worked Example...................... 27
AD5762R Features.......................................................................... 28
Analog Output Control ............................................................. 28
Digital Offset and Gain Control............................................... 28
Programmable Short-Circuit Protection ................................ 28
Digital I/O Port........................................................................... 28
die Temperature Sensor............................................................. 28
Local Ground Offset Adjust...................................................... 28
Applications Information .............................................................. 29
Typical Operating Circuit ......................................................... 29
Layout Guidelines........................................................................... 30
Galvanically Isolated Interface ................................................. 30
Microprocessor Interfacing....................................................... 30
Evaluation Board ........................................................................ 32
Outline Dimensions ....................................................................... 33
Ordering Guide .......................................................................... 33
Rev. PrA | Page 2 of 33



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Preliminary Technical Data
FUNCTIONAL BLOCK DIAGRAM
AD5762R
PGND AVDD AVSS AVDD AVSS
REFOUT
DVCC
DGND
AD5762R
+5V
REFERENCE
REFGND
REFA
REFERENCE
BUFFERS
RSTOUT
VOLTAGE
MONITOR
AND
CONTROL
RSTIN
ISCC
SDIN
SCLK
SYNC
SDO
D0
D1
BIN/2SCOMP
16
INPUT SHIFT
REGISTER
AND
CONTROL
LOGIC
INPUT
REG A
GAIN REG A
OFFSET REG A
INPUT
REG B
GAIN REG B
OFFSET REG B
DAC 16
REG A
DAC A
DAC 16
REG B
DAC B
REFERENCE
BUFFERS
G1
G2
G1
G2
TEMP
SENSOR
VOUTA
AGNDA
VOUTB
AGNDB
CLR
LDAC
REFB
Figure 1. Functional Block Diagram
TEMP
Rev. PrA | Page 3 of 33



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AD5762R
Preliminary Technical Data
SPECIFICATIONS
AVDD = 11.4 V to 16.5 V, AVSS = −11.4 V to −16.5 V, AGND = DGND = REFGND = PGND = 0 V; REFA, REFB = 5 V external;
DVCC = 2.7 V to 5.25 V, RLOAD = 10 kΩ, CL = 200 pF. All specifications TMIN to TMAX, unless otherwise noted.
Table 1.
Parameter
ACCURACY
Resolution
Relative Accuracy (INL)
Differential Nonlinearity
Bipolar Zero Error
Bipolar Zero TC3
Zero-Scale Error
Zero-Scale TC3
Gain Error
Gain TC3
DC Crosstalk3
REFERENCE INPUT/OUTPUT
Reference Input3
Reference Input Voltage
DC Input Impedance
Input Current
Reference Range
Reference Output
Output Voltage
Reference TC
Load3
Output Noise3
(0.1 Hz to 10 Hz)
Noise Spectral Density3
Output Voltage Drift vs. Time
Output Voltage Drift vs. Time
Line Regulation
Load Regulation
Thermal Hysteresis
OUTPUT CHARACTERISTICS3
Output Voltage Range4
Output Voltage Drift vs. Time
Short Circuit Current
Load Current
Capacitive Load Stability
RL = ∞
RL = 10 kΩ
DC Output Impedance
C Grade2
16
±1
±1
±2
±2
±2
±2
±0.02
±2
0.5
5
1
±10
1/7
4.997/5.003
±10
1
18
75
±40
±50
TBD
TBD
TBD
±10.5263
±14
±13
±15
10
±1
200
1000
0.3
Unit
Bits
LSB max
LSB max
mV max
ppm FSR/°C max
mV max
ppm FSR/°C max
% FSR max
ppm FSR/°C max
LSB max
Test Conditions/Comments
Outputs unloaded
Guaranteed monotonic
At 25°C; error at other temperatures
obtained using bipolar zero TC
At 25°C; error at other temperatures
obtained using zero scale TC
At 25°C; error at other temperatures
obtained using gain TC
V nominal
MΩ min
µA max
V min/V max
V min/V max
ppm/°C max
Mmin
µV p-p typ
nV/√Hz typ
ppm/500hr typ
ppm/1000hr typ
ppm/V typ
ppm/mA typ
ppm typ
V min/V max
V min/V max
ppm FSR/500 hours typ
ppm FSR/1000 hours typ
mA typ
mA max
pF max
pF max
Ω max
±1% for specified performance
Typically 100 MΩ
Typically ±30 nA
At 25°C
At 10 kHz
AVDD/AVSS = ±11.4 V, REFA, REFB = 5V
AVDD/AVSS = ±16.5 V, REFA, REFB = 7V
RISCC = 6 kΩ, see Figure 31
For specified performance
Rev. PrA | Page 4 of 33




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