843252AGLF Datasheet PDF - Integrated Circuit System

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843252AGLF
Integrated Circuit System

Part Number 843252AGLF
Description ICS843252AGLF
Page 15 Pages


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Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS843252
FEMTOCLOCKS™CRYSTAL-TO-3.3V LVPECL
FREQUENCY SYNTHESIZER
GENERAL DESCRIPTION
The ICS843252 is a 2 differential output LVPECL
ICS Synthesizer designed to generate Ethernet refer-
HiPerClockS™ ence clock frequencies and is a member of the
HiPerClocks™ family of high performance clock
solutions from ICS. Using a 19.53125MHz or
25MHz, 18pF parallel resonant crystal, the following frequen-
cies can be generated based on the settings of 4 frequency
select pins (SEL[A1:A0], SEL[B1:B0]): 625MHz, 312.5MHz,
156.25MHz, and 125MHz.
The two banks have their own dedicated frequency select
pins and can be independently set for the frequencies
mentioned above. The ICS843252 ICS’ 3rd generation
low phase noise VCO technology and can achieve 1ps or
lower typical rms phase jitter, easily meeting Ethernet
jitter requirements. The ICS843252 is packaged in a small
16-pin TSSOP package.
FEATURES
• Two 3.3V differential LVPECL output pairs
• Using a 19.53125MHz or 25MHz crystal, the two output
banks can be independently set for 625MHz, 312.5MHz,
156.25MHz or 125MHz
• Crystal oscillator interface
• VCO range: 490MHz to 680MHz
• RMS phase jitter @ 156.25MHz (1.875MHz - 20MHz):
0.47ps (typical)
• Full 3.3V supply mode
• 0°C to 70°C ambient operating temperature
• Industrial temperature available upon request
• Available in both standard and lead-free RoHS-compliant
packages
www.DataSheet.co.kr
BLOCK DIAGRAM
SELA[0:1} Pullup
2
XTAL_IN
XTAL_OUT
OSC
Phase
Detector
VCO
490MHz - 680MHz
FB_SEL Pulldown
SELB[0:1} Pullup
2
Feedback Divider
0 = ÷25 (default)
1 = ÷32
0 0 ÷1
0 1 ÷2
1 0 ÷3
1 1 ÷4 (default)
0 0 ÷2
0 1 ÷4
1 0 ÷5
1 1 ÷8 (default)
QA
nQA
QB
nQB
PIN ASSIGNMENT
nQB
QB
VCCO_B
SELB1
SELB0
VCCO_A
QA
nQA
1
2
3
4
5
6
7
8
16 XTAL_IN
15 XTAL_OUT
14 VEE
13 SELA1
12 SELA0
11 VCC
10 VCCA
9 FB_SEL
ICS843252
16-Lead TSSOP
4.4mm x 5.0mm x 0.92mm
package body
G Package
Top View
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on
initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications
without notice.
843252AG
www.icst.com/products/hiperclocks.html
REV. A NOVEMBER 9, 2005
1
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Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS843252
FEMTOCLOCKS™CRYSTAL-TO-3.3V LVPECL
FREQUENCY SYNTHESIZER
TABLE 1. PIN DESCRIPTIONS
Νυμ βε ρ Ναμ ε
Τψπε
Δ ε σχριπτιον
1, 2 nQB, QB Output
Differential clock outputs. LVPECL interface levels.
3
VCCO_B
Power
Output supply pin for QB, nQB outputs.
4,
5
SELB1,
SELB0
Input
Pullup
Division select pins for Bank B. Default = High.
LVCMOS/LVTTL interface levels.
6
VCCO_A
Power
Output supply pin for QA output.
7, 8 QA, nQA Output
Differential clock outputs. LVPECL interface levels.
Feedback divide select. When Low (default), the feedback divider is set
9 FB_SEL Input Pulldown for ÷25. When HIGH, the feedback divider is set for ÷32.
LVCMOS/LVTTL interface levels.
10
VCCA
Power
Analog supply pin.
11 VCC Power
Core supply pin.
12,
13
SELA0,
SELA1
Input
Pullup
Division select pins for Bank A. Default = HIGH.
LVCMOS/LVTTL interface levels.
14
15, 16
VEE
XTAL_OUT,
XTAL_IN
Power
Input
Negative supply pin.
Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
CIN
RPULLDOWN
R
PULLUP
Parameter
Input Capacitance
Input Pulldown Resistor
Input Pullup Resistor
www.DataSheet.co.kr
Test Conditions
Minimum
Typical
4
51
51
Maximum
Units
pF
kΩ
kΩ
843252AG
www.icst.com/products/hiperclocks.html
2
REV. A NOVEMBER 9, 2005
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Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS843252
FEMTOCLOCKS™CRYSTAL-TO-3.3V LVPECL
FREQUENCY SYNTHESIZER
TABLE 3A. BANK A FREQUENCY TABLE
Inputs
Crystal Frequency
(MHz)
25
25
20
22.5
25
24
20
19.44
19.44
15.625
18.75
19.44
18.75
15.625
FB_SEL
0
0
0
0
0
0
0
1
1
1
1
1
1
1
SELA1
0
0
0
1
1
1
1
0
0
0
1
1
1
1
SELA0
0
1
1
0
1
1
1
0
1
1
0
1
1
1
Feedback
Divider
Bank A
Output Divider
M/N
Multiplication
Factor
25 1
25
25 2
12.5
25 2 12.500
25 3 8.333
25 4
6.25
25 4
6.25
25 4
6.25
32 1
32
32 2
16
32 2
16
32 3 10.667
32 4
8
32 4
8
32 4
8
QA/nQA
Output
Frequency
(MHz)
625
312.5
250
187.5
156.25
150
125
622.08
311.04
250
200
155.52
150
125
www.DataSheet.co.kr
843252AG
www.icst.com/products/hiperclocks.html
3
REV. A NOVEMBER 9, 2005
Datasheet pdf - http://www.DataSheet4U.net/



No Preview Available !

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS843252
FEMTOCLOCKS™CRYSTAL-TO-3.3V LVPECL
FREQUENCY SYNTHESIZER
TABLE 3B. BANK B FREQUENCY TABLE
Inputs
Crystal Frequency
(MHz)
25
20
25
24
20
25
25
24
20
19.44
15.625
19.44
18.75
15.625
15.625
19.44
18.75
15.625
FB_SEL
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
SELB1
0
0
0
0
0
1
1
1
1
0
0
0
0
0
1
1
1
1
SELB0
0
0
1
1
1
0
1
1
1
0
0
1
1
1
0
1
1
1
Feedback
Divider
25
25
25
25
25
25
25
25
25
32
32
32
32
32
32
32
www.DataSheet.co.kr
32
32
Bank B
Output Divider
2
2
4
4
4
5
8
8
8
2
2
4
4
4
5
8
8
8
M/N
Multiplication
Factor
12.5
12.5
6.25
6.25
6.25
5
3.125
3.125
3.125
16
16
8
8
8
6.4
4
4
4
QB/nQB
Output
Frequency
(MHz)
312.5
250
156.25
150
125
125
78.125
75
62.5
311.04
250
155.52
150
125
100
77.76
75
62.5
TABLE 3C. OUTPUT BANK CONFIGURATION SELECT FUNCTIONTABLES
Inputs
SELA1
SELA0
00
01
10
11
Outputs
QA
÷1
÷2
÷3
÷4 (default)
Inputs
SELB1
SELB0
00
01
10
11
Outputs
QB
÷2
÷4
÷5
÷8 (default)
TABLE 3D. FEEDBACK DIVIDER CONFIGURATION SELECT FUNCTION TABLE
FB_SEL
0
1
Inputs
Feedback Divide
÷25 (default)
÷32
843252AG
www.icst.com/products/hiperclocks.html
4
REV. A NOVEMBER 9, 2005
Datasheet pdf - http://www.DataSheet4U.net/



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