74VHC165 Datasheet PDF - Toshiba Semiconductor

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74VHC165
Toshiba Semiconductor

Part Number 74VHC165
Description 8-BIT SHIFT REGISTER
Page 11 Pages


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TC74VHC165F/FT/FK
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74VHC165F, TC74VHC165FT, TC74VHC165FK
8-Bit Shift Register (P-IN, S-OUT)
The TC74VHC165 is an advanced high speed CMOS 8-BIT
PARALLEL/SERIAL-IN, SERIAL-OUT SHIFT REGISTER
fabricated with silicon gate C2MOS technology.
It achieves the high speed operation similar to equivalent Bipolar
Schottky TTL while maintaining the CMOS low power dissipation.
It consists of parallel-in or serial-in, serial-out 8-bit shift register
with a gated clock input. When the SHIFT/ LOAD input is held
high, the serial data input is enabled and the eight frip-frops
perform serial shifting with each clock pulse.
When the SHIFT/ LOAD input is held low, the parallel data is
loaded synchronously into the register at positive going transition of
the clock pulse.
The CK-INH input should be shifted high only when the CK input
is held high.
An Input protection circuit ensures that 0 to 5.5 V can be applied
to the input pins without regard to the supply voltage. This device
can be used to interface 5 V to 3 V systems and on two supply
systems such as battery back up. This circuit prevents device
destruction due to mismatched supply and input voltages.
Features
High speed: fmax = 150 MHz (typ.) at VCC = 5 V
Low power dissipation: ICC = 4 μA (max) at Ta = 25°C
High noise immunity: VNIH = VNIL = 28% VCC (min)
Power down protection is provided on all inputs.
Balanced propagation delays: tpLH ∼− tpHL
Wide operating voltage range: VCC (opr) = 2 V to 5.5 V
Pin and function compatible with 74ALS165
TC74VHC165F
TC74VHC165FT
TC74VHC165FK
Weight
SOP16-P-300-1.27A: 0.18 g (typ.)
TSSOP16-P-0044-0.65A: 0.06 g (typ.)
VSSOP16-P-0030-0.50: 0.02 g (typ.)
Start of commercial production
1992-05
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Pin Assignment
TC74VHC165F/FT/FK
IEC Logic Symbol
S/L 1
CK 2
E3
F4
G5
H6
QH 7
GND 8
16 VCC
15 CK INH
14 D
13 C
12 B
11 A
10 SI
9 QH
S/L
CK INH
CK
(1)
(15)
(2)
SI (10)
A (11)
B (12)
C (13)
D (14)
E (3)
F (4)
G (5)
H (6)
SRG 8
C1 [LOAD]
> 1 C2/
2D
1D
1D
1D
(9)
(7)
QH
QH
Truth Table
SHIFT/
LOAD
L
H
H
H
H
H
H
Inputs
CK
INH
CK
XX
SERIAL
IN
X
LH
LL
LH
LL
XH
X
HX
X
PARALLEL
A······H
a······h
X
X
X
X
X
X
Internal
Outputs
Outputs
QA QB QH QH
abhh
H QAn QGn QGn
L QAn QGn QGn
H QAn QGn QGn
L QAn QGn QGn
No Change
No Change
X: Don’t care
a······h: The level of steady state input voltage at inputs A through H respectively
QAn to QGn: The level of QA to QG, respectively, before the most recent positive transition of the CK.
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Timing Chart
CK
CK INH
Serial Input
Shift/ LOAD
A
B
C
Parallel
Inputs
D
E
F
G
H
Output QH
Output QH
TC74VHC165F/FT/FK
SERIAL SHIFT
H DON’T CARE UNTIL S/L GOES “L”
L
L
H
L
H
L
H
H LHLHLLH
L HLHLHHL
INHIBIT
LOAD
SERIAL SHIFT
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System Diagram
SERIAL
INPUT
10
CLOCK
2
15
CLOCK
INHIBIT
TC74VHC165F/FT/FK
ABCDE FGH
11 12 13 14
3
4
5
6
DPDQ
CK
S/L
DPDQ
CK
S/L
DPDQ
CK
S/L
DPDQ
CK
S/L
DPDQ
CK
S/L
DPDQ
CK
S/L
DPDQ
CK
S/L
DPDQ
CK
S/L
9 QH
7 QH
1
SHIFT/
LOAD
PD
φL
D
ϕ ϕL φ
φφ
CK ϕ
ϕL
S/L φL
ϕ
Qn
Absolute Maximum Ratings (Note)
Characteristics
Symbol
Rating
Unit
Supply voltage range
DC input voltage
DC output voltage
Input diode current
Output diode current
DC output current
DC VCC/ground current
Power dissipation
Storage temperature
VCC
VIN
VOUT
IIK
IOK
IOUT
ICC
PD
Tstg
0.5 to 7.0
0.5 to 7.0
0.5 to VCC + 0.5
20
±20
±25
±50
180
65 to 150
V
V
V
mA
mA
mA
mA
mW
°C
Note:
Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
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