74HCT9046A Datasheet PDF - NXP

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74HCT9046A
NXP

Part Number 74HCT9046A
Description PLL
Page 30 Pages


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74HCT9046A
PLL with band gap controlled VCO
Rev. 7 — 29 February 2016
Product data sheet
1. General description
The 74HCT9046A. This device features reduced input threshold levels to allow interfacing
to TTL logic levels. Inputs also include clamp diodes, this enables the use of current
limiting resistors to interface inputs to voltages in excess of VCC.
2. Features and benefits
Operation power supply voltage range from 4.5 V to 5.5 V
Low power consumption
Complies with JEDEC standard no. 7A
Inhibit control for ON/OFF keying and for low standby power consumption
center frequency up to 17 MHz (typical) at VCC = 5.5 V
Choice of two phase comparators:
PC1: EXCLUSIVE-OR
PC2: Edge-triggered JK flip-flop
No dead zone of PC2
Charge pump output on PC2, whose current is set by an external resistor Rbias
center frequency tolerance 10 %
Excellent Voltage Controlled Oscillator (VCO) linearity
Low frequency drift with supply voltage and temperature variations
On-chip band gap reference
Glitch free operation of VCO, even at very low frequencies
Zero voltage offset due to operational amplifier buffering
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V



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NXP Semiconductors
74HCT9046A
PLL with band gap controlled VCO
3. Applications
FM modulation and demodulation where a small center frequency tolerance is
essential
Frequency synthesis and multiplication where a low jitter is required (e.g. video
picture-in-picture)
Frequency discrimination
Tone decoding
Data synchronization and conditioning
Voltage-to-frequency conversion
Motor-speed control
4. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
Description
74HCT9046AD 40 C to +125 C SO16
plastic small outline package; 16 leads; body width
3.9 mm
74HCT9046APW 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads; body
width 4.4 mm
Version
SOT109-1
SOT403-1
74HCT9046A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 29 February 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
2 of 44



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NXP Semiconductors
5. Block diagram
74HCT9046A
PLL with band gap controlled VCO
&
&$

&%

IRXW
ILQ 9&&
9&2B287 &203B,1 6,*B,1
  
$

5 
5
5 
5
9&2
3+$6(
&203$5$725

3&B287
 3&3B287
 3&B287
3+$6(
&203$5$725


5%
5ELDV
5
5
&
  

,1+
'(0B287 9&2B,1
*1'
5V
Fig 1. Block diagram
6. Functional diagram

*1'
PEG
 &203B,1
3&B287
3&3B287

 6,*B,1
ĭ
 5%
3&B287

 &$
 &%
9&2B287

 5
 5
9&2
 9&2B,1
'(0B287 
 ,1+
PEG
Fig 2. Logic symbol
ĭ
3//
$
 &203B,1
3&B287
3&3B287
 6,*B,1
3&B287
 &$
 &%
 5
 5
 5%
'(0B287
9&2B287
 9&2B,1
 ,1+
PEG
Fig 3. IEC logic symbol




74HCT9046A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 29 February 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
3 of 44



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 5
5
 5
5
9UHI
IRXW
&


&$ &% 9&2B287
ILQ

&203B,1

6,*B,1
3&
9&2
9UHI
ORJLF

XS
'4
&3
5
4
'
3&3
3&B287
3&3B287 

5
 '(0B287
56
9UHI 9UHI
%$1'
*$3
ORJLF

'4
&3
5
4
'
GRZQ
&+$5*(
3803
9UHI
3&B287 
 5
5
&
5% 
5ELDV
Fig 4. Logic diagram
9&2B,1

,1+

 5  5ELDV
PEG



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