74HC4075-Q100 Datasheet PDF - NXP

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74HC4075-Q100
NXP

Part Number 74HC4075-Q100
Description Triple 3-input OR gate
Page 13 Pages


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74HC4075-Q100;
74HCT4075-Q100
Triple 3-input OR gate
Rev. 1 — 22 May 2013
Product data sheet
1. General description
The 74HC4075-Q100; 74HCT4075-Q100 is a triple 3-input OR gate. Inputs include clamp
diodes. This enables the use of current limiting resistors to interface inputs to voltages in
excess of VCC.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Complies with JEDEC standard JESD7A
Input levels:
For 74HC4075-Q100: CMOS level
For 74HCT4075-Q100: TTL level
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
Multiple package options
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range
74HC4075D-Q100 40 C to +125 C
74HCT4075D-Q100
74HC4075PW-Q100 40 C to +125 C
74HCT4075PW-Q100
Name
SO14
TSSOP14
Description
plastic small outline package; 14 leads;
body width 3.9 mm
plastic thin shrink small outline package;
14 leads; body width 4.4 mm
Version
SOT108-1
SOT402-1



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NXP Semiconductors
74HC4075-Q100; 74HCT4075-Q100
Triple 3-input OR gate
4. Functional diagram
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Fig 1. Logic symbol
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DDD
Fig 2. IEC logic symbol
5. Pinning information
5.1 Pinning
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Fig 3. Logic diagram (one gate)
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+&74
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Fig 4. Pin configuration SO14
+&4
+&74
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Fig 5. Pin configuration TSSOP14
5.2 Pin description
Table 2. Pin description
Symbol
Pin
1A, 2A, 3A
3, 1, 11
1B, 2B, 3B
4, 2, 12
GND
7
1C, 2C, 3C
5, 8, 13
1Y, 2Y, 3Y
6, 9, 10
VCC 14
Description
data input
data input
ground (0 V)
data input
data output
supply voltage
74HC_HCT4075_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 May 2013
© NXP B.V. 2013. All rights reserved.
2 of 13



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NXP Semiconductors
74HC4075-Q100; 74HCT4075-Q100
Triple 3-input OR gate
6. Functional description
Table 3.
Input
nA
L
H
X
X
Function selection[1]
nB
L
X
H
X
nC
L
X
X
H
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care
7. Limiting values
Output
nY
L
H
H
H
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min Max Unit
VCC supply voltage
IIK input clamping current
IOK output clamping current
IO output current
VI < 0.5 V or VI > VCC + 0.5 V
VO < 0.5 V or VO > VCC + 0.5 V
0.5 V < VO < VCC + 0.5 V
0.5
[1] -
[1] -
-
+7
20
20
25
V
mA
mA
mA
ICC
IGND
Tstg
Ptot
supply current
ground current
storage temperature
total power dissipation
SO14 and TSSOP14 packages
-
50
65
[2] -
50
-
+150
500
mA
mA
C
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SO14 package: Ptot derates linearly with 8 mW/K above 70 C.
For TSSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 C.
74HC_HCT4075_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 May 2013
© NXP B.V. 2013. All rights reserved.
3 of 13



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NXP Semiconductors
74HC4075-Q100; 74HCT4075-Q100
Triple 3-input OR gate
8. Recommended operating conditions
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter
Conditions
VCC
VI
VO
Tamb
t/V
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
9. Static characteristics
74HC4075-Q100
Min Typ Max
2.0 5.0 6.0
0 - VCC
0 - VCC
40 - +125
- - 625
- 1.67 139
- - 83
74HCT4075-Q100
Min Typ Max
4.5 5.0 5.5
0 - VCC
0 - VCC
40 - +125
---
- 1.67 139
---
Unit
V
V
V
C
ns/V
ns/V
ns/V
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
74HC4075-Q100
VIH HIGH-level VCC = 2.0 V
input voltage VCC = 4.5 V
1.5 1.2 -
1.5
-
1.5
-V
3.15 2.4 - 3.15
-
3.15
-V
VCC = 6.0 V
4.2 3.2 -
4.2
-
4.2
-V
VIL LOW-level VCC = 2.0 V
input voltage VCC = 4.5 V
- 0.8 0.5
-
0.5
-
0.5 V
- 2.1 1.35 -
1.35
-
1.35 V
VCC = 6.0 V
- 2.8 1.8
-
1.8
-
1.8 V
VOH HIGH-level
VI = VIH or VIL
output voltage
IO = 20 A; VCC = 2.0 V 1.9 2.0
-
1.9
-
1.9
-V
IO = 20 A; VCC = 4.5 V 4.4 4.5 -
4.4
-
4.4
-V
IO = 20 A; VCC = 6.0 V 5.9 6.0 -
5.9
-
5.9
-V
IO = 4.0 mA; VCC = 4.5 V 3.98 4.32 -
3.84
-
3.7
-V
IO = 5.2 mA; VCC = 6.0 V 5.48 5.81 -
5.34
-
5.2
-V
VOL LOW-level
VI = VIH or VIL
output voltage
IO = 20 A; VCC = 2.0 V
- 0 0.1
-
0.1
-
0.1 V
IO = 20 A; VCC = 4.5 V
- 0 0.1
-
0.1
-
0.1 V
IO = 20 A; VCC = 6.0 V
- 0 0.1
-
0.1
-
0.1 V
IO = 4.0 mA; VCC = 4.5 V
- 0.15 0.26
-
0.33
-
0.4 V
IO = 5.2 mA; VCC = 6.0 V
- 0.16 0.26
-
0.33
-
0.4 V
II input leakage VI = VCC or GND;
current
VCC = 6.0 V
- - 0.1 -
1
-
1 A
ICC
supply current VI = VCC or GND; IO = 0 A;
-
- 2.0
-
20
-
40 A
VCC = 6.0 V
74HC_HCT4075_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 May 2013
© NXP B.V. 2013. All rights reserved.
4 of 13



74HC4075-Q100 datasheet pdf
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NXP
74HC4075-Q100 pdf

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