5N60C Datasheet PDF - Fairchild Semiconductor

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5N60C
Fairchild Semiconductor

Part Number 5N60C
Description FQB5N60C
Page 9 Pages


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FQB5N60C / FQI5N60C
600V N-Channel MOSFET
QFET TM
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switched mode power supplies,
active power factor correction, electronic lamp ballasts
based on half bridge topology.
Features
• 4.5A, 600V, RDS(on) = 2.5@VGS = 10 V
• Low gate charge ( typical 15 nC)
• Low Crss ( typical 6.5 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
D
GS
D2-PAK
FQB Series
GDS
I2-PAK
FQI Series
D
!
G!
◀▲
!
S
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TA = 25°C)*
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
FQB5N60C / FQI5N60C
600
4.5
2.6
18
± 30
210
4.5
10
4.5
3.13
100
0.8
-55 to +150
300
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Thermal Characteristics
Symbol
Parameter
RθJC
Thermal Resistance, Junction-to-Case
RθJA
Thermal Resistance, Junction-to-Ambient*
RθJA
Thermal Resistance, Junction-to-Ambient
* When mounted on the minimum pad size recommended (PCB Mount)
Typ Max Units
- 1.25 °C/W
- 40 °C/W
- 62.5 °C/W
©2003 Fairchild Semiconductor Corporation
Rev. A, October 2003



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Electrical Characteristics
Symbol
Parameter
TC = 25°C unless otherwise noted
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
BVDSS
/ TJ
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
IDSS
Zero Gate Voltage Drain Current
IGSSF
IGSSR
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
VGS = 0 V, ID = 250 µA
ID = 250 µA, Referenced to 25°C
VDS = 600 V, VGS = 0 V
VDS = 480 V, TC = 125°C
VGS = 30 V, VDS = 0 V
VGS = -30 V, VDS = 0 V
600
--
--
--
--
--
--
0.6
--
--
--
--
--
--
1
10
100
-100
V
V/°C
µA
µA
nA
nA
On Characteristics
VGS(th)
RDS(on)
Gate Threshold Voltage
Static Drain-Source
On-Resistance
gFS Forward Transconductance
VDS = VGS, ID = 250 µA
VGS = 10 V, ID = 2.25 A
VDS = 40 V, ID = 2.25 A
(Note 4)
2.0
--
--
--
2.0
4.7
4.0
2.5
--
V
S
Dynamic Characteristics
Ciss Input Capacitance
Coss
Output Capacitance
Crss Reverse Transfer Capacitance
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
-- 515 670
-- 55
72
-- 6.5 8.5
pF
pF
pF
Switching Characteristics
td(on)
Turn-On Delay Time
tr Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf Turn-Off Fall Time
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
VDD = 300 V, ID = 4.5A,
RG = 25
(Note 4, 5)
VDS = 480 V, ID = 4.5A,
VGS = 10 V
(Note 4, 5)
--
--
--
--
--
--
--
10 30
42 90
38 85
46 100
15 19
2.5 --
6.6 --
ns
ns
ns
ns
nC
nC
nC
Drain-Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain-Source Diode Forward Current
-- -- 4.5
ISM Maximum Pulsed Drain-Source Diode Forward Current
-- -- 18
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 4.5 A
-- -- 1.4
trr Reverse Recovery Time
VGS = 0 V, IS = 4.5 A,
-- 300
--
Qrr Reverse Recovery Charge
dIF / dt = 100 A/µs
(Note 4) --
2.2
--
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 18.9mH, IAS = 4.5 A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD 4.5A, di/dt 200A/µs, VDD BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width 300µs, Duty cycle 2%
5. Essentially independent of operating temperature
A
A
V
ns
µC
©2003 Fairchild Semiconductor Corporation
Rev. A, October 2003



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Typical Characteristics
101 Top :
VGS
15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
100
5.5 V
5.0 V
Bottom : 4.5 V
10-1
10-2
10-1
Notes :
1. 250μ s Pulse Test
2. TC = 25
100 101
V , Drain-Source Voltage [V]
DS
Figure 1. On-Region Characteristics
6
5
4 VGS = 10V
3
2
VGS = 20V
1
Note : TJ = 25
0
0 2 4 6 8 10
I , Drain Current [A]
D
Figure 3. On-Resistance Variation vs
Drain Current and Gate Voltage
1000
800
600
400
200
0
10-1
C
iss
Coss
C
rss
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
Notes ;
1. VGS = 0 V
2. f = 1 MHz
100 101
V , Drain-Source Voltage [V]
DS
Figure 5. Capacitance Characteristics
©2003 Fairchild Semiconductor Corporation
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101
150oC
100 25oC
-55oC
10-1
2
Notes :
1. VDS = 40V
2. 250μ s Pulse Test
468
V , Gate-Source Voltage [V]
GS
10
Figure 2. Transfer Characteristics
101
100
10-1
0.2
150
25
Notes :
1. VGS = 0V
2. 250μ s Pulse Test
0.4 0.6 0.8 1.0 1.2
V , Source-Drain voltage [V]
SD
1.4
Figure 4. Body Diode Forward Voltage
Variation with Source Current
and Temperature
12
10 VDS = 120V
VDS = 300V
8 VDS = 480V
6
4
2
Note : ID = 4.5A
0
0 4 8 12 16
Q , Total Gate Charge [nC]
G
Figure 6. Gate Charge Characteristics
Rev. A, October 2003



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Typical Characteristics (Continued)
1.2
1.1
1.0
0.9
0.8
-100
Notes :
1. V = 0 V
GS
2. ID = 250 μ A
-50 0 50 100 150
TJ, Junction Temperature [oC]
200
Figure 7. Breakdown Voltage Variation
vs Temperature
OperationinThis Area
is Limited by RDS(on)
101 100 µs
1 ms
10 ms
100 ms
100 DC
10-1
10-2
100
Notes :
1. TC = 25 oC
2. TJ = 150oC
3. SinglePulse
101 102
V , Drain-Source Voltage [V]
DS
103
Figure 9. Maximum Safe Operating Area
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3.0
2.5
2.0
1.5
1.0
0.5
0.0
-100
Notes :
1. VGS = 10 V
2. ID = 2.25 A
-50 0
50 100 150
TJ, Junction Temperature [oC]
200
Figure 8. On-Resistance Variation
vs Temperature
5
4
3
2
1
0
25 50 75 100 125 150
T , Case Temperature []
C
Figure 10. Maximum Drain Current
vs Case Temperature
100
D = 0 .5
1 0 -1
0 .2
0 .1
0 .0 5
0 .0 2
0 .0 1
1 0 -2
1 0 -5
N o te s :
1 . Z θ JC(t) = 1 .2 5 /W M a x .
2 . D u ty F a c to r, D = t1/t2
3 . T JM - T C = P D M * Z θ JC(t)
s in g le p u ls e
PDM
t1
t2
1 0 -4
1 0 -3
1 0 -2
1 0 -1
100
t , S q u a re W a v e P u ls e D u ra tio n [s e c ]
1
101
Figure 11. Transient Thermal Response Curve
©2003 Fairchild Semiconductor Corporation
Rev. A, October 2003



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